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Intel’s 10nm Ice Lake Xeon Processors and Platform Details Exposed – LGA 4189 Socket, 8-Channel Memory, Up To 230W TDP SKUs

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It looks like the first details regarding Intel's future Xeon processors which will fall under the Ice Lake 10nm architecture have been revealed. The details which come from Power Stamp Alliance (via Anandtech) reveal key details about the Ice Lake-SP family and also the platform which will support it.

Intel's Ice Lake-SP 10nm Xeon Family Detailed - New and Bigger Socket, Much Higher TDP SKUs

While Cascade Lake-SP family is yet to launch, it looks like Ice Lake-SP which is supposed to be the first 10nm Xeon family will be hitting market between 2018-2019. The key details are that Ice Lake-SP CPUs will not only be the first 10nm processors but would also feature support on an entirely new platform which have been detailed in the latest documents.

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While the current Skylake-SP Xeon family uses the LGA 3647 socket and housed on the Purely platform which will exist up till Cascade Lake-SP Xeon parts, the Ice Lake-SP family will use an entirely new socket design. This is termed as the LGA 4189 socket and will be Intel's largest pin socket design to date. The socket will be even larger than the AMD's TR4 / SP4 socket for Ryzen Threadripper and EPYC part which comes with 4094 LGA pins.

Coming to CPU support, the post Purely platform will house up to 230W CPUs. Note that current Skylake-SP Xeons range from 140W to 205W variants while Cascade Lake-SP parts scale from 165 to 205W variants. The higher TDP would be due to several reasons, we can see a core count and clock speed bump in addition to the expected implementation of OmniPath and on-package FPGAs features which would make a whole lot of sense for high-end Xeon Ice Lake-SP parts.

It also looks like all three Xeon lineups which include Skylake-SP, Cascade Lake-SP and Ice Lake-SP will feature a similar power implementation and compatibility for the socket is available through an adapter but it won't mean that CPUs from both platforms can run on the different sockets. The Ice Lake-SP parts are also rated for high-current where such an implementation can run two CPUs (Ice Lake-SP) along with 16 DDR4 memory slots.

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The memory slots are noteworthy as that would make a total of 16 slots dedicated to each CPU that refers to having octa-channel memory support. This is higher than the hexa-channel memory that we are aware of on the Skylake-SP part. The Cascade Lake-SP platform features support for 2933 MHz DDR4 memory. The extra memory slots can bump the memory all the way up to 1 TB from the current maximum of 786 GB using the highest density products.

Lastly, it is stated that Power Stamp Alliance would be posting more information on the Ice Lake-SP platform around May during the Open Compute Summit so expect even more details by then.

Intel Xeon SP Families:

Family BrandingSkylake-SPCascade Lake-SP/APCooper Lake-SPIce Lake-SPSapphire RapidsEmerald RapidsGranite RapidsDiamond Rapids
Process Node14nm+14nm++14nm++10nm+10nm Enhanced SuperFin?10nm Enhanced SuperFin?7nm?sub-7nm?
Platform NameIntel PurleyIntel PurleyIntel Cedar IslandIntel WhitleyIntel Eagle StreamIntel Eagle StreamIntel Mountain Stream
Intel Birch Stream
Intel Mountain Stream
Intel Birch Stream
MCP (Multi-Chip Package) SKUsNoYesNoNoYesTBDTBD (Possibly Yes)TBD (Possibly Yes)
SocketLGA 3647LGA 3647LGA 4189LGA 4189LGA 4677LGA 4677LGA 4677TBD
Max Core CountUp To 28Up To 28Up To 28Up To 40Up To 56?TBDTBDTBD
Max Thread CountUp To 56Up To 56Up To 56Up To 80Up To 112?TBDTBDTBD
Max L3 Cache38.5 MB L338.5 MB L338.5 MB L360 MB L3TBDTBDTBDTBD
Memory SupportDDR4-2666 6-ChannelDDR4-2933 6-ChannelUp To 6-Channel DDR4-3200Up To 8-Channel DDR4-3200Up To 8-Channel DDR5-4800Up To 8-Channel DDR5-5200?TBDTBD
PCIe Gen SupportPCIe 3.0 (48 Lanes)PCIe 3.0 (48 Lanes)PCIe 3.0 (48 Lanes)PCIe 4.0 (64 Lanes)PCIe 5.0 (80 lanes)PCIe 5.0PCIe 6.0?PCIe 6.0?
TDP Range140W-205W165W-205W150W-250W105-270WUp To 350W?TBDTBDTBD
3D Xpoint Optane DIMMN/AApache PassBarlow PassBarlow PassCrow PassCrow Pass?Donahue Pass?Donahue Pass?
CompetitionAMD EPYC Naples 14nmAMD EPYC Rome 7nmAMD EPYC Rome 7nmAMD EPYC Milan 7nm+AMD EPYC Genoa ~5nmAMD Next-Gen EPYC (Post Genoa)AMD Next-Gen EPYC (Post Genoa)AMD Next-Gen EPYC (Post Genoa)
Launch20172018202020212021-2022?2022?2023?2024?
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