AMD EPYC Genoa ‘Zen 4’ CPUs To Feature New Memory, New Socket ‘SP5 Platform’ & New Capabilities – EPYC Milan ‘Zen 3’ To Retain 64 Cores, PCIe 4, DDR4 & Socket Compatibility
During a presentation at the HPC-AI Advisory Council UK conference, AMD revealed a plethora of information regarding their next-generation EPYC CPUs based on the Zen 3 and Zen 4 cores. With the arrival of Zen 2 based EPYC Rome processors, AMD has managed to shift the server landscape, delivering impressive performance with the best in class efficiency and value. With the upcoming generations, we should further expect AMD to uplift the server market with dominant products.
AMD's Zen 3 Based EPYC Milan and Zen 4 Based EPYC Genoa Detailed - Zen 3 Delivers Perf/Watt Improvements, Zen 4 Focuses on Adding Support For New Memory, Socket, Features
There's a lot of new details that were revealed for both EPYC Milan (Zen 3) and EPYC Genoa (Zen 4) during the conference. The AMD datacenter roadmap places Milan server chips for launch in 2020 followed by Genoa server chips in 2021. What's interesting is the feature set that is detailed for the upcoming processors so let's start off with EPYC Milan.
AMD CPU Roadmap (2017-2022)
|Architecture||Zen (1)||Zen (1) / Zen+||Zen (2) / Zen+||Zen (3) / Zen 2||Zen (3) / Zen 3 (+)||Zen (4) / Zen 3 (+)||Zen (4)||Zen (4) / Zen (5)|
|Process Node||14nm||14nm / 12nm||7nm||7nm||7nm||5nm / 6nm||5nm||5nm / 3nm|
|Server||EPYC 'Naples'||EPYC 'Naples'||EPYC 'Rome'||EPYC 'Rome'||EPYC 'Milan'||EPYC 'Genoa'||TBD||TBD|
|Max Server Cores / Threads||32/64||32/64||64/128||64/128||64/128||TBD||TBD||TBD|
|High End Desktop||Ryzen Threadripper 1000 Series (White Haven)||Ryzen Threadripper 2000 Series (Coflax)||Ryzen Threadripper 3000 Series (Castle Peak)||Ryzen Threadripper 3000 Series (Castle Peak)||Ryzen Threadripper 5000 Series (Chagall)||Ryzen Threadripper 6000 Series||Ryzen Threadripper 7000 Series||Ryzen Threadripper 8000 Series|
|Ryzen Family||Ryzen 1000 Series||Ryzen 2000 Series||Ryzen 3000 Series||Ryzen 4000/5000 Series||Ryzen 5000 Series||Ryzen 6000 Series||Ryzen 7000 Series||Ryzen 8000 Series|
|Max HEDT Cores / Threads||16/32||32/64||64/128||64/128||64/128||TBD||TBD||TBD|
|Mainstream Desktop||Ryzen 1000 Series (Summit Ridge)||Ryzen 2000 Series (Pinnacle Ridge)||Ryzen 3000 Series (Matisse)||Ryzen 5000 Series (Vermeer)||Ryzen 5000/6000 Series (Warhol)||Ryzen 6000/7000 Series (Raphael)||TBD||TBD|
|Max Mainstream Cores / Threads||8/16||8/16||16/32||16/32||16/32||16/32||TBD||TBD|
|Budget APU||N/A||Ryzen 2000 Series (Raven Ridge)||Ryzen 3000 Series (Picasso Zen+)||Ryzen 4000 Series (Renoir Zen 2)||Ryzen 5000 Series (Cezanne Zen 3)||Ryzen 6000 Series (Rembrandt Zen 3+)||Ryzen 7000 Series (Phoenix Zen 4)||Ryzen 8000 (Strix Point Zen 5)|
AMD EPYC Milan - 7nm+ Zen 3 Cores, SP3 Socket Compatible, PCIe 4.0, DDR4 Memory
The AMD EPYC Milan processors would succeed the current EPYC Rome lineup. The fundamental change for the EPYC Milan lineup would be the new Zen 3 core architecture which will be based upon a 7nm+ process node. From what we know and what AMD has officially shown, the AMD Zen 3 based EPYC Milan processors would focus primarily on performance per watt enhancements but that doesn't mean we won't be looking at core updates. While performance per watt is at the core of Zen 3 cores, they would also deliver an uplift to overall performance as stated by AMD's CTO, Mark Papermaster.
“TSMC may have been measuring a basic device like a ring oscillator — our claims are for a real product,”
“Moore’s Law is slowing down, semiconductor nodes are more expensive, and we’re not getting the frequency lift we used to get,” he said in a talk during the launch, calling the 7-nm migration “
Looking ahead, a 7-nm-plus node using extreme ultraviolet lithography (EUV) will “primarily leverage efficiency with some modest device performance opportunities,”
In a recent slide, AMD showed their Zen 3 based 7nm+ processors offering better performance per watt than Intel's 10nm Ice Lake-SP Xeon chips. As for the new features, other than featuring its Zen 3 core design, Milan would offer socket compatibility with SP3 platforms, would feature support for DDR4 memory, PCIe 4.0 interface and is stated to offer 64 cores and 2x the threads (128 threads). This may put the recent rumors of Milan introducing 4-way SMT to rest but it may be possible that AMD offers a custom-design that offers more cores and more threads per core. The chips will have a TDP rated at 120-225W which is similar to existing Rome parts.
Summing everything up for EPYC Milan, we are looking at the following main features:
- 7nm+ Zen 3 cores (~64 core / 128 thread)
- Pin Compatible With SP3 Socket
- 120W-225W TDP SKUs
- PCIe 4.0 Support
- DDR4 Memory Support
- Launch in 2020
Another interesting detail for the core design itself was shared during the presentation. AMD has shown that unlike Zen 2 which has 16 MB of L3 cache per CCX within a CCD, Zen 3 would feature a shared cache (32 MB+) for each die. This would allow all cores to share the entirety of the L3 cache available on the die rather than each CCX having its smaller and separate cache shared among the cores. This may also be a potential confirmation of Milan offering 8 Zen 3 cores within a single CCX.
AMD also confirmed that they are currently sampling the first Milan CPUs which is fantastic news for customers awaiting the chips in 2020.
AMD EPYC Genoa - Post-7nm Zen 4 Cores, SP5 Socket Platform, DDR5 Memory, PCIe 5.0 Protocol
The AMD EPYC Genoa processors based on the Zen 4 core architecture were a mystery until AMD officially unveiled them in their latest roadmap during the EPYC Rome launch. Currently in-design with a planned launch fo 2021, the Genoa lineup would bring a brand new set of features to the server landscape.
AMD announced that EPYC Genoa would be compatible with the new SP5 platform which brings a new socket so SP3 compatibility would exist up till EPYC Milan. The EPYC Genoa processors would also feature support for new memory and new capabilities. It looks like AMD would definitely be jumping on board the DDR5 bandwagon in 2021. Since DDR5 comes with Zen 4, it is possible that AMD's Ryzen and Threadripper lines would also feature support for the new memory interface. It is also stated that new capabilities would be introduced on EPYC Genoa which sounds like a hint at the new PCIe 5.0 protocol which would double the bandwidth of PCIe 4.0, offering 128 Gbps link speeds across an x16 interface.
Summing everything up for EPYC Genoa, we are looking at the following main features:
- Post-7nm Zen 4 cores
- SP5 Platform With New Socket
- PCIe 5.0 Support
- DDR5 Memory Support
- Launch in 2021
AMD looks to be in a really good position with its EPYC server processors, even more so than their desktop and mobility portfolios. If everything runs smoothly for AMD and their long-term Zen roadmap in the years to come, we can see them dominating all sectors of the CPU market again. AMD’s EPYC Rome has already secured major deals with Amazon (AWS) and will also be providing 7nm Rome processors to power the Atos BullSequana XH2000 Supercomputer while a future-generation EPYC line would be powering the Frontier Supercomputer that is being built by U.S. Department of Energy and aiming deployment in 2021.
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