AMD’s Next-Gen 7nm+ Zen 3 Powered EPYC Milan CPU Spotted For The First Time, Up To 2.2 GHz Clocks On Early ES Chip
AMD's next-generation EPYC Milan CPUs are closing in and we have got a very first look at the Zen 3 powered sever powerhouse from the red team. The EPYC Milan server processors will be part of the 3rd Generation EPYC lineup, replacing the EPYC Rome lineup that launched almost two years ago while offering significant improvements in HPC & data center applications.
AMD 3rd Gen EPYC Milan CPU Spotted, 7nm+ Zen 3 Powered Early ES Chip With Up To 2.2 GHz Clocks
The AMD EPYC Milan CPU family will be powered by the brand new Zen 3 cores which will be based on the TSMC 7nm+ process node. While we have learned a lot from previous leaks and rumors, the CPUs themselves haven't shown up anywhere until now.
The latest bits and info come from ExecutableFix over at Twitter who managed to get details on an unreleased AMD engineering sample. The CPU was mentioned within a changelog for the Linux OS and has the "AMD Eng Sample: 100-000000114-07_22/15_N" codename. The codename shows us a very early look at ES clock speeds which are set at 1.5 GHz base and 2.2 GHz boost. The core count for this specific chip is not mentioned yet. Following is the main log file for the EPYC Milan CPU:
Hit this issue on rhel8.3.0-av Milan hosts when hotplug vcpu into rhel8.3.0 guest:
[root@amd-milan-03 home]# /usr/libexec/qemu-kvm -cpu EPYC -device EPYC-x86_64-cpu,socket-id=1,core-id=0,thread-id=1,id=cpu1 -m 4096 -smp 1,threads=2,cores=1,sockets=3,maxcpus=6
qemu-kvm: -device EPYC-x86_64-cpu,socket-id=1,core-id=0,thread-id=1,id=cpu1: Invalid CPU [socket: 22009, die: 0, core: 0, thread: 1] with APIC ID 44019, valid index range 0:5
host version info:
host cpu info:
model name : AMD Eng Sample: 100-000000114-07_22/15_N
The leaker reports that EPYC Rome also featured similar clock speeds in early ES state which final variants hitting up to 3.4 GHz boost clocks. Interestingly, Komachi refers to the AMD EPYC Milan chip as Genesis which is the codename for the AMD Ryzen Threadripper 4000 (Genesis Peak) series lineup that's going to feature Zen 3 cores. Considering that AMD EPYC & Threadripper CPUs have a lot of things in common, we can see why Genesis is being referenced here.
With that said, I personally do not expect to see a next-gen Threadripper lineup until mid of 2021 since AMD has yet to introduce its Ryzen 4000 'Vermeer' desktop lineup based on the Zen 3 core architecture.
AMD CPU Roadmap (2018-2020)
|Ryzen Family||Ryzen 1000 Series||Ryzen 2000 Series||Ryzen 3000 Series||Ryzen 4000 Series||Ryzen 5000 Series|
|Architecture||Zen (1)||Zen (1) / Zen+||Zen (2) / Zen+||Zen (3) / Zen 2||Zen (4) / Zen 3|
|Process Node||14nm||14nm / 12nm||7nm||7nm+ / 7nm||5nm / 7nm|
|High End Server (SP3)||EPYC 'Naples'||EPYC 'Naples'||EPYC 'Rome'||EPYC 'Milan'||EPYC 'Genoa'|
|Max Server Cores / Threads||32/64||32/64||64/128||TBD||TBD|
|High End Desktop (TR4)||Ryzen Threadripper 1000 Series (White Haven)||Ryzen Threadripper 2000 Series (Coflax)||Ryzen Threadripper 3000 Series (Castle Peak)||Ryzen Threadripper 4000 Series (Genesis Peak)||Ryzen Threadripper 5000 Series|
|Max HEDT Cores / Threads||16/32||32/64||64/128||64/128?||TBD|
|Mainstream Desktop (AM4)||Ryzen 1000 Series (Summit Ridge)||Ryzen 2000 Series (Pinnacle Ridge)||Ryzen 3000 Series (Matisse)||Ryzen 4000 Series (Vermeer)||Ryzen 5000 Series (Warhol)|
|Max Mainstream Cores / Threads||8/16||8/16||16/32||TBD||TBD|
|Budget APU (AM4)||N/A||Ryzen 2000 Series (Raven Ridge)||Ryzen 3000 Series (Picasso Zen+)||Ryzen 4000 Series (Renoir Zen 2)||Ryzen 5000 Series (Cezanne Zen 3)|
AMD EPYC Milan - 7nm Zen 3 Cores, SP3 Socket Compatible, PCIe 4.0, DDR4 Memory
The AMD EPYC Milan processors would succeed the current EPYC Rome lineup. The fundamental change for the EPYC Milan lineup would be the new Zen 3 core architecture which will be based upon an advanced 7nm process node. From what we know and what AMD has officially shown, the AMD Zen 3 based EPYC Milan processors would focus primarily on overall performance per watt enhancements but that doesn't mean we won't be looking at core updates.
AMD has so far confirmed themselves that Zen 3 brings a brand new CPU architecture, which helps deliver significant IPC gains, faster clocks, and even higher core counts than before. Some rumors have even pointed to a 17% increase in IPC and a 50% increase in Zen 3's floating-point operations along with a major cache redesign.
When asked about what kind of performance gain Milan's CPU core microarchitecture, which is known as Zen 3, will deliver relative to the Zen 2 microarchitecture that Rome relies on in terms of instructions processed per CPU clock cycle (IPC), Norrod observed that -- unlike Zen 2, which was more of an evolution of the Zen microarchitecture that powers first-gen Epyc CPUs -- Zen 3 will be based on a completely new architecture.
Norrod did qualify his remarks by pointing out that Zen 2 delivered a bigger IPC gain than what's normal for an evolutionary upgrade -- AMD has said it's about 15% on average -- since it implemented some ideas that AMD originally had for Zen but had to leave on the cutting board. However, he also asserted that Zen 3 will deliver performance gains "right in line with what you would expect from an entirely new architecture."
In a recent slide, AMD showed their Zen 3 based 7nm processors offering better performance per watt than Intel's 10nm Ice Lake-SP Xeon chips. As for the new features, other than featuring its Zen 3 core design, Milan would offer socket compatibility with SP3 platforms, would feature support for DDR4 memory, PCIe 4.0 interface, and is stated to offer 64 cores and 2x the threads (128 threads).
The chips will have a TDP rated at 120-225W which is similar to existing Rome parts. Summing everything up for EPYC Milan, we are looking at the following main features:
- Advanced 7nm Zen 3 cores (~64 core / 128 thread)
- Pin Compatible With SP3 Socket
- 120W-225W TDP SKUs
- PCIe 4.0 Support
- DDR4 Memory Support
- Launch in 2020
Another interesting detail for the core design itself was shared during the presentation. AMD has shown that unlike Zen 2 which has 16 MB of L3 cache per CCX within a CCD, Zen 3 would feature a shared cache (32 MB+) for each die. This would allow all cores to share the entirety of the L3 cache available on the die rather than each CCX having its smaller and separate cache shared among the cores. This may also be a potential confirmation of Milan offering 8 Zen 3 cores within a single CCX.
Moving forward, as far as the launch date is concerned, AMD has reaffirmed that EPYC Milan CPUs will ship in late 2020. The CPUs will go head to head with Intel's Cooper Lake-SP 14nm and Ice Lake-SP 10nm CPUs which will be available this year.
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