AMD EPYC Rome Officially Launched: 7nm High-Performance Server CPUs With More Cores, Higher Frequencies – Best-In-Class Performance, Efficiency, and Value
AMD has officially announced the launch of their 7nm EPYC Rome processors today, offering higher core count, best in class performance, value & efficiency. Being the first high-performance data center, AI, & HPC centric chips based on TSMC's bleeding-edge 7nm process node, the Rome lineup takes AMD one step ahead of their Xeon rivals that still utilize 14nm technology.
AMD EPYC Rome Officially Launched - 7nm, 64 Cores, 128 Threads, Higher Clocks, Best-In-Class Performance, Efficiency, and Value
AMD's 2nd Generation EPYC Rome series is the successor to the first Generation EPYC Naples line of processors which launched two years back. Based on the 7nm Zen 2 core technology which has offered a 15% IPC uplift over the original Zen core, the AMD EPYC Rome CPUs are designed to offer higher performance and better efficiency than their predecessors.
At the launch event, several customers and partners joined AMD on stage to discuss new AMD EPYC processor offerings:
- Google announced it has deployed 2nd Gen AMD EPYC processors in its internal infrastructure production datacenter environment and in late 2019 will support new general-purpose machines powered by 2nd Gen AMD EPYC processors on Google Cloud Compute Engine as well;
- Twitter announced it will deploy 2nd Gen AMD EPYC processors across its datacenter infrastructure later this year, reducing TCO by 25%;
- Microsoft announced the preview of new Azure virtual machines for general purpose applications, as well as limited previews of cloud-based remote desktops and HPC workloads based on 2nd Gen AMD EPYC processors today;
- HPE announced the continued support of the AMD EPYC processor family with plans to triple their AMD-based portfolio with a broad range of 2nd Gen AMD EPYC processor-based systems, including the HPE ProLiant DL385 and HPE ProLiant DL325 servers;
- Cray announced the Air Force Weather Agency will be using a Cray Shasta system with 2ndGen AMD EPYC processors to provide comprehensive terrestrial and space weather information to the U.S. Air Force and Army;
- Lenovo announced new solutions that are specifically built to take advantage of the full range of enhanced capabilities found in the 2nd Gen AMD EPYC processors. Available today, the ThinkSystem SR655 and SR635 are ideal solutions for use cases such as video infrastructure, virtualization, software-defined storage and more, with exceptional energy efficiency;
- Dell announced the upcoming availability of newly designed servers optimized for 2nd Gen AMD EPYC processors;
- VMware and AMD announced a close collaboration to deliver support for new security and other features of the high-performance 2ndGen AMD EPYC processors within VMware vSphere.
Zen 2 doesn't only offer higher performance but due to a smaller manufacturing process, the resultant die size has allowed AMD to cram twice the number of cores and threads on the EPYC 7002 CPUs while retaining higher out of box clock speeds.
Following are some of the salient features of the 7nm EPYC Rome processors:
- Built on 7nm advanced process technology – the best the industry has to offer, allowing for denser compute capabilities with lower power consumption
- The world’s first 64 core data center CPU, built using Zen 2 high-performance cores and AMD’s innovative Chiplet architecture
- The world’s first mainstream PCIe Gen 4.0 data center CPU with a bandwidth of up to 64GB/s, twice of PCIe Gen 3.0
- Embedded security protection to help defend your CPU, applications, and data
AMD has made significant changes to their CPU architecture which help deliver twice the throughput of their first-generation Zen architecture. The major points include an entirely redesigned execution pipeline, major floating-point advances which doubled the floating-point registers to 256-bit and double bandwidth for load/store units. One of the key upgrades for Zen 2 is the doubling of the core density which means we are now looking at 2x the core count for each core complex (CCX).
- Improved Execution Pipeline
- Doubled Floating Point (256-bit) and Load/Store (Doubled Bandwidth)
- Doubled Core Density
- Half the Energy Per Operation
- Improved Branch Prediction
- Better Instruction Pre-Fetching
- Re-Optimized Instruction Cache
- Larger Op Cache
- Increased Dispatch / Retire Bandwidth
- Maintaining High Throughput for All Modes
Each EPYC Rome processor is made up of 8 Zen 2 dies which are interconnected through the 2nd Gen Infinity Fabric with an I/O die that acts as a central hub of the processor. The Rome processor has a total of 32 billion transistors on the entire package, which makes it one of the most densely packed chip design ever developed.
AMD CPU Roadmap (2017-2022)
|Architecture||Zen (1)||Zen (1) / Zen+||Zen (2) / Zen+||Zen (3) / Zen 2||Zen (3) / Zen 3 (+)||Zen (4) / Zen 3 (+)||Zen (4)||Zen (4) / Zen (5)|
|Process Node||14nm||14nm / 12nm||7nm||7nm||7nm||5nm / 6nm||5nm||5nm / 3nm|
|Server||EPYC 'Naples'||EPYC 'Naples'||EPYC 'Rome'||EPYC 'Rome'||EPYC 'Milan'||EPYC 'Genoa'||TBD||TBD|
|Max Server Cores / Threads||32/64||32/64||64/128||64/128||64/128||TBD||TBD||TBD|
|High End Desktop||Ryzen Threadripper 1000 Series (White Haven)||Ryzen Threadripper 2000 Series (Coflax)||Ryzen Threadripper 3000 Series (Castle Peak)||Ryzen Threadripper 3000 Series (Castle Peak)||Ryzen Threadripper 5000 Series (Chagall)||Ryzen Threadripper 6000 Series||Ryzen Threadripper 7000 Series||Ryzen Threadripper 8000 Series|
|Ryzen Family||Ryzen 1000 Series||Ryzen 2000 Series||Ryzen 3000 Series||Ryzen 4000/5000 Series||Ryzen 5000 Series||Ryzen 6000 Series||Ryzen 7000 Series||Ryzen 8000 Series|
|Max HEDT Cores / Threads||16/32||32/64||64/128||64/128||64/128||TBD||TBD||TBD|
|Mainstream Desktop||Ryzen 1000 Series (Summit Ridge)||Ryzen 2000 Series (Pinnacle Ridge)||Ryzen 3000 Series (Matisse)||Ryzen 5000 Series (Vermeer)||Ryzen 5000/6000 Series (Warhol)||Ryzen 6000/7000 Series (Raphael)||TBD||TBD|
|Max Mainstream Cores / Threads||8/16||8/16||16/32||16/32||16/32||16/32||TBD||TBD|
|Budget APU||N/A||Ryzen 2000 Series (Raven Ridge)||Ryzen 3000 Series (Picasso Zen+)||Ryzen 4000 Series (Renoir Zen 2)||Ryzen 5000 Series (Cezanne Zen 3)||Ryzen 6000 Series (Rembrandt Zen 3+)||Ryzen 7000 Series (Phoenix Zen 4)||Ryzen 8000 (Strix Point Zen 5)|
The AMD EPYC Rome '7002' Server CPU Lineup - EPYC 7742 64 Core Is The Highest Performance X86 Processor In The World
The AMD EPYC Rome '7002' server lineup is made up of 19 SKUs of which, the EPYC 7742 is the flagship part. All SKUs feature a similar Chiplet design which includes several Zen 2 dies and a singular 14nm I/O (on-board PCH) die.
The AMD EPYC 7742 is the chip that would set the benchmark for all other server chips to comes. Offering an insane 64 cores and 128 threads on a single package, the chip offers 256 MB of cache and a TDP of 225W (Up To 240W). The processor has a base clock of 2.25 GHz and a boost clock of 3.40 GHz while featuring 128 PCIe Gen 4 lanes. AMD's CEO, Dr.Lisa Su, has termed the flagship as the highest performance x86 processor in the world.
AMD EPYC Rome processors offer up to 2x performance increase with 2 times better performance per dollar than the competition. (Image Credits: INpack Hardware)
In comparison benchmarks versus the Intel Xeon Platinum 8280L, the AMD EPYC 7742 turned out to be 97% faster in SpecRate 2017 Integer workloads, 88% faster in SpecRate 2017 floating work-loads for high-performance computing and 84% better performance in SpecjBB 2015 workloads.
The processor would cost $6950 US which puts it at around $3000 US lower than the Xeon Platinum 8180 which offers only 28 cores and 56 threads. The Xeon part does feature higher frequencies of 2.7 GHz and 4.0 GHz (base/boost, respectively) but in terms of pure value, efficiency (7nm vs 14nm) & the marginally better IPC of the Zen 2 core, it looks like the EPYC 7742 would take an easy win.
While Intel has added hardware fixes for a range of CPU vulnerabilities on their processors such as Spectre and Meltdown, it should be noted that there are other vulnerabilities being discovered and Intel's Xeon lineup is suspected to be affected by them. Meanwhile, Rome is both hardware& OS-side strengthened against these vulnerabilities (Spectre, SpectreV4).
Aside from that, the Cascade Lake-AP line which is supposed to offer an even higher number of cores (Platinum 9282 with 56 cores and 112 threads) would start at beyond 20K USD from what we've heard. That's more than twice the asking price of AMD's flagship Rome processor.
AMD's lineup also includes various 64 core, 48 core, 32 core, 24 core, 16 core,& 8 core processors which we have listed in the table below along with their respective specifications and prices. You can also see that AMD has several ‘1P’ parts which are basically designed for single-socket servers while the ‘2P’ parts are compatible with both single and dual-socket servers. AMD mentioned that their EPYC Rome lineup offers 1.8-2x performance increase versus Xeon parts, more than 2X performance per dollar and at 40-50% lower operating expenses.
AMD EPYC Rome '7nm Zen 2' CPU Lineup Specifications and Prices:
|CPU Name||Cores / Threads||Base Clock||Max Boost Clock||Cache||TDP||Stepping||OPN||US Price|
|EPYC 7H12||64 / 128||2.60 GHz||3.30 GHz||256 MB||280W||TBD||TBD||TBD|
|EPYC 7742||64 / 128||2.25 GHz||3.40 GHz||256 MB||225W||SSP-B0||100-000000053||$6950|
|EPYC 7702||64 / 128||2.00 GHz||3.35 GHz||256 MB||180W||SSP-B0||100-000000038||$6450|
|EPYC 7702P||64 / 128||2.00 GHz||3.35 GHz||256 MB||200W||SSP-B0||100-000000047||$4425|
|EPYC 7662||64 / 128||2.00 GHz||3.30 GHz||256 MB||225W||SSP-B0||TBD||TBD|
|EPYC 7642||48 / 96||2.40 GHz||3.40 GHz||256 MB||225W||SSP-B0||100-000000074||$4775|
|EPYC 7552||48 / 96||2.20 GHz||3.35 GHz||192 MB||180W||SSP-B0||100-000000076||$4025|
|EPYC 7542||32 / 64||2.90 GHz||3.40 GHz||128 MB||225W||SSP-B0||100-000000075||$3400|
|EPYC 7532||32 / 64||2.40 GHz||3.20 GHz||256 MB||200W||SSP-B0||TBD||TBD|
|EPYC 7502||32 / 64||2.50 GHz||3.35 GHz||128 MB||180W||SSP-B0||100-000000054||$2600|
|EPYC 7502P||32 / 64||2.50 GHz||3.35 GHz||128 MB||180W||SSP-B0||100-000000045||$2300|
|EPYC 7452||32 / 64||2.35 GHz||3.35 GHz||128 MB||155W||SSP-B0||100-000000057||$2025|
|EPYC 7402||24 / 48||2.80 GHz||3.35 GHz||128 MB||180W||SSP-B0||100-000000046||$1783|
|EPYC 7402P||24 / 48||2.80 GHz||3.35 GHz||128 MB||180W||SSP-B0||100-000000048||$1250|
|EPYC 7352||24 / 48||2.30 GHz||3.20 GHz||128 MB||155W||SSP-B0||100-000000077||$1350|
|EPYC 7302||16 / 32||2.80 GHz||3.30 GHz||128 MB||155W||SSP-B0||100-000000043||$978|
|EPYC 7302P||16 / 32||2.80 GHz||3.30 GHz||128 MB||155W||SSP-B0||100-000000049||$825|
|EPYC 7282||16 / 32||2.00 GHz||3.20 GHz||64 MB||120W||SSP-B0||100-000000078||$650|
|EPYC 7272||12 / 24||2.60 GHz||3.20 GHz||64 MB||120W||SSP-B0||100-000000079||$625|
|EPYC 7262||8 / 16||3.20 GHz||3.40 GHz||128 MB||155W||SSP-B0||100-000000041||$575|
|EPYC 7252||8 / 16||2.80 GHz||3.20 GHz||64 MB||120W||SSP-B0||100-000000080||$475|
|EPYC 7252P||8 / 16||2.80 GHz||3.20 GHz||64 MB||120W||SSP-B0||100-000000081||$450|
AMD EPYC Server Platform - 8 Channel 3200 MHz Memory, 128 PCIe Gen 4 Lanes, Drop-In Compatibility On Socket SP3
When it comes to platform details, AMD is still relying on the SP3 socket which means that EPYC Naples customers would get access to drop-in compatibility with Rome generation of processors. The EPYC Rome processors would still allow for octa-channel memory but the frequency has been upped from 2400 MHz to 3200 MHz. In addition to that, the platform itself can support up to 4 TB of DDR4 memory (1.2V ECC).
Another major feature that has been introduced with Zen 2 processors is the PCIe Gen 4 protocol. Offering twice the bandwidth of PCIe Gen 3 and 128 PCIe Gen 4 lanes, the EPYC Rome processors will be able to communicate faster with PCIe operated hardware such as graphics accelerators & high-end storage devices. In addition to that, there would be custom made options to enable an even higher number of lanes, scaling beyond 128.
Now the main advantage that AMD gains over Intel is that PCIe Gen 4 offers them twice the bandwidth as PCIe Gen 3. This is crucial along with the updated Infinity Fabric that AMD is using on their server processors. While the previous Infinity Fabric relied on the PCIe Gen 3 speeds for inter-chip communication, having PCI-e Gen 4 would mean that the Infinity Fabric would be affecting the PCI-e capacity lesser this time, directly enhancing the chip-to-chip, socket-to-socket, and I/O bandwidth speeds.
Since there's excess bandwidth available, there would be less reliance on the x16 links between the two chips and it is said that this would open up some flexibility, allowing partners who don't want the excess bandwidth to use them for practical purposes rather than server a high-speed interlink. Having just three x16 links instead of the four would allow for additional PCIe lanes that could serve outside the IF communication channel.
This would allow for additional PCIe Gen 4 connectivity, giving users up to 162 PCIe Gen 4 lanes. It is reasonable to consider that most won't go this route since lower bandwidth for chip-to-chip I/O is not an ideal approach but AMD has given a path to choose from.
AMD Expected To Capture Major Market Share With EPYC Rome Processors - Breaks 37 Server World Records in Virtualisation, 80 In Total
The AMD EPYC Rome processor family is expected to lift AMD's server CPU market share to 10% by 2020 which is a great deal considering Intel's ex-CEO, Brian Krzanich, had stated that they don't want AMD capturing 15% market share but given the demand and adoption of EPYC processors in major server platforms, 15% shouldn't be too far from now.
Just for number's sake, Dell EMC has announced that they will be tripling their AMD server offering by adopting more of the EPYC range of processors.
"Out of, let's say, 50 or so platforms that we have today," he said, "three of them are AMD - we'll probably triple that by the end of this year."
He also confirmed that Dell EMC will be launching servers powered by AMD's newest architecture - a 7nm architecture codenamed 'Rome' - in the second half of 2019.
- Dominique Vanhamme (DELL EMEA vice president and general manager for storage and compute)
Based on such strong growth figures and adoption rate, we can expect AMD to give major blows to Intel's Xeon efforts and they're server-side of operations. Hewlett Packard Enterprise (HPC), in their press release, mentioned that their new ProLiant DL325, ProLiant DL385, and HPE Apollo 35 servers which utilize second-gen EPYC Rome processors have broken 37 world records. It is also mentioned that EPYC Rome CPUs offer 61% performance increase in virtualization and a 29% better price to performance ratio than existing Naples parts. HPE has also announced that these three servers are available today while a total of 12 servers are planned to be available by next year.
(This measures the performance of a virtualized server platform under a demanding database workload. It stresses CPU and memory hardware, storage, networking, hypervisor, and the guest operating system.)
The series of results have left HPE pledging to triple the number of AMD EPYC-equipped products in its portfolio in 18 months. (EPYC is a line of CPUs introduced in 2017 based on the company’s Zen microarchitecture). via Business Computing World
It should also be pointed out that when AMD was designing their 7nm Zen 2 based EPYC Rome processors, they had internally estimated what the performance of Intel's next-gen server part would be like. The next-gen 10nm part known as Ice Lake-SP is scheduled to launch in 2020 with Cascade Lake-SP and Cooper Lake-SP being offered as an intermediary solution based on 14nm (++).
“Rome was designed to compete favorably with “Ice Lake” Xeons, but it is not going to be competing against that chip. We are incredibly excited, and it is all coming together at one point.” – Forrest Norrod.
“Our plan for the Naples-Rome-Milan roadmap was based on assumptions around Intel’s roadmap and our estimation of what would we do if we were Intel,” Norrod continues.
“We thought deeply about what they are like, what they are not like, what their culture is and what their likely reactions are, and we planned against a very aggressive Intel roadmap, and I really Rome and Milan and what is after them against what we thought Intel could do. And then, we come to find out that they can’t do what we thought they might be able to. And so, we have an incredible opportunity
AMD had already confirmed earlier that their EPYC Rome processors have been designed to compete favorably against Intel's Ice Lake-SP parts. This only means that AMD would have an even greater edge versus the Intel 14nm++ server parts arriving this year.
One of the biggest advantage that EPYC Rome processors will have over Intel parts is that they will be socket compatible with EPYC Naples so all of those vendors who have been using Naples would get drop-in compatibility for AMD's next-gen 7nm EPYC Rome processors on day one. AMD also announced their Zen 4 EPYC lineup which is now in-design and will be known as "Genoa".
AMD looks to be in a really good position with their EPYC server processors, even more so than their desktop and mobility portfolios. If everything runs smoothly for AMD and their long-term Zen roadmap in the years to come, we can see them dominating all sectors of the CPU market again. AMD's EPYC Rome has already secured major deals with Amazon (AWS) and will also be providing 7nm Rome processors to power the Atos BullSequana XH2000 Supercomputer while a future-generation EPYC line would be powering the Frontier Supercomputer that is being built by U.S. Department of Energy and aiming deployment in 2021.
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