AMD Raven Ridge APU With PS4 Class Graphics Due In 2017 – Packs 16CU Vega GPU, HBM & 4 Zen Cores
AMD’s next generation AM4 Zen APU “Raven Ridge” will reportedly feature 4 Zen cores, a 1024 core Vega GPU & stacked High Bandwidth Memory. All inside a compact 210mm² die with a thermal design power target of 95-35 watts. According to the same report from Bitsandchips.it, The company is also working on a smaller ~170mm² variant of Raven Ridge with 768 Vega GCN cores and no high bandwidth memory, just good old DDR4.
The beefier chip of the two will be compatible with the desktop AM4 socket. While the leaner, HBM-less, version will mainly go into notebooks.
|APU||Raven Ridge FP5||Raven Ridge AM4|
|Process Node||14nm FinFET||14nm FinFET|
|Die Size||~ 170 mm2||~ 210 mm2|
AMD Bringing APUs With PS4 Gaming Grade Graphics And High Bandwidth Memory To Market In 2017
Last year we brought you an exclusive detailing the company’s entire APU plans for the post-bulldozer 2017+ era. And they include everything from the dual core 10 watt 7nm “Grey Hawk” to the insanely powerful HPC APU featuring the extraordinary 32 Zen core “Naples” chip and a 4096 stream processor “Greenland/Vega10” GPU. We also brought you some key details about the HBM equipped Raven Ridge APU. Including the fact that it will feature 128GB/s of memory bandwidth and deliver Playstation 4 class graphics performance.
With 1024 Vega GCN cores and plenty of memory bandwidth to feed them Raven Ridge can in fact easily outperform Sony’s 1.84 TFLOPS PS4 graphics engine. In fact, AMD has just introduced a 35W mobile GPU based on Polaris 11 with 1024 stream processors and 2 teraflops of graphics horsepower. The chip in question is the Radeon Pro 460 and it’s featured in Apple’s new Macbook Pro lineup. With everything we know about Vega being significantly more power efficient, we can expect Raven Ridge’s integrated graphics engine to easily surpass the PS4.
AMD’s Die Stacking Program Is At Full Tilt
This isn’t the first time that we’ve actually caught wind of AMD working on next generation products featuring HBM and die stacking technology in general. In fact, going all the way back to 2012, the company’s head of the die stacking program ,Bryan Black, gave a public talk titled “Die Stacking and the System” on die stacking technology and the pivotal role it’s going to play in all of the company’s future products.
Besides the paper that detailed how HBM is going to work with Raven Ridge last year we’ve also spotted another paper back in 2014 detailing AMD’s “Fast Forward Project” to implement die stacking across all of the company’s product lines. It included a demonstration of an APU with integrated stacked high bandwidth memory in addition to stacked non-volatile memory cells. These memory cells would act as the system’s storage system and would essentially replace SSDs.
This integration would offer several key advantages in compact low power mobile devices. The paper also described a fascinating new innovation called “Processor-in-Memory” which strives to push the performance of the device and reduce power. This is achieved by doing more of the computational work inside of the memory, instead of moving data across the chip and back which is quite wasteful.
The company publicly disclosed plans in 2015 to develop an HPC APU. A paper came out later that described what this chip would look like. It demonstrated the use of stacked memory in a super-processor based on the 32 core Naples CPU and 4096 GCN core Vega 10 GPU. This type of processor could prove extremely effective at a host of applications. Including deep learning workloads which is a near-perfect pairing to this kind of heterogeneous system architecture enabled chip.
AMD APU Roadmap
|WCCFTech||Raven Ridge||Banded Kestrel||Horned Owl||Snowy Owl||Gray Hawk|
|Process||14nm FinFET||14nm FinFET||14nm FinFET||14nm FinFET||7nm 14nm FinFET|
|Packaging||FP5 BGA / AM4||FP5 BGA||FP5 BGA / AM4||AM4||AM4+|
|Expected Arrival Date||2H 2017||1H 2018||2H 2017||1H 2017||2019|