Intel Server CPU Roadmap Rumors: Cascade Lake-AP 14nm++, Cooper Lake-SP/AP 14nm++ and Ice Lake-SP/AP 10nm+ With Multi-Chip Packages
Intel's current roadmap for desktop and server CPUs isn't officially shown to consumers but somewhere in Intel HQ, they have multiple roadmaps detailing multiple families. These CPU roadmaps often get leaked by insiders and today, we are going to talk about some of the new rumors emerging about Intel's upcoming CPU families for the server market.
Intel CPU Roadmap Rumors: Cooper Lake-SP, Ice Lake-SP, Cascade Lake-AP For Servers
Earlier today, we posted news about Brian Krzanich resigning as the CEO of Intel, following a ‘past consensual’ relationship with an Intel employee. Now his departure from Intel could result in a big impact on Intel's CPU roadmaps so everything that will be reported in this article as per current roadmaps is subjected to change. Those products that have already launched or confirmed for the market availability this year will be shipping as expected but those which haven't actually been panned out entirely will be the ones that could be affected.
Coming back to the main topic, the big blue hasn't shown public a detailed roadmap of their CPU families in a while. Compared to AMD who have a long-term roadmap panned out and shown to the public, The blue team isn't willing to show off their product roadmap or architecture roadmap to the public yet. Hopefully, that may change if the next CEO and top leadership are willing to gain the attention of the public and make people interested in their current and future products more.
Intel processors are segmented into different markets and each segment has their own roadmap. The server side gets their own internal roadmap while the desktop side gets their own. We shall start off with the server side first which was the top focus of Intel during the Brian Krzanich era.
Intel Xeon (Server/Datacenter) CPU Roadmap Rumors
The Intel Xeon platform has been one of the strongest segment for Intel for many years but the recent return of AMD with their disruptive AMD EPYC 'Naples' and their advanced EPYC 'Rome' family has and will do major damage to Intel in this segment, aiming at a multi-digit market share gain in the coming years. You can read more on that here.
Intel has a roadmap planned out for the next-generation Xeon families which will include Cascade Lake-SP and Ice Lake-SP. These are the two parts which are officially mentioned by Intel but there have been leaks and rumors of more server products than the two just mentioned above. In total, Intel is rumored to have the following products in their pipeline in the coming years:
- Cascade Lake-SP (14nm++, Expected Launch 2018)
- Cascade Lake-AP (14nm++, Expected Launch 2019)
- Cooper Lake-SP/AP (14nm++, Expected Launch 2019-2020)
- Ice Lake-SP (10nm+, Expected Launch 2020/2021)
Intel Cascade Lake-SP (14nm++) Xeon Family
The Cascade Lake-SP is first expected to arrive in late 2018 if everything goes smoothly for the blue team which hasn't been so far. Even if the launch slips to 2019, except an early Q1 launch rather the much later one. The processors will be a slight refresh of the current Skylake-SP family, based on the same Purley platform (LGA 3647 socket).
Intel Cascade Lake-AP (14nm++) Xeon Family
There will also be the Cascade Lake-AP family which is the name for the 'Advanced Processor' lineup. These chips are expected to be the first Intel MCP (Multi Chip Package) design, allowing Intel to offer more core counts to the datacenter and compete against AMD's EPYC processors which have already been designed to go against the Intel Ice Lake-SP (10nm+) family in a favorable fashion. Learn more about the Cascade Lake-AP processors here.
Intel Cooper Lake-SP/AP (14nm++) Xeon Family
The latest rumor emerging from Intel's subreddit is that the Cooper Lake (server) family also exists. This line of Xeon processors will feature dual dies like the Cascade Lake-AP line and 6 UPI links. The Cooper Lake server processors were previously rumored to be an intermediate solution between the Cascade Lake and Ice Lake server platforms while being based on the existing 14nm++ process so that shows that Intel still isn't pretty much done with the 14nm node.
Take this with as much salt as necessary, as I cannot reveal sources.
Cooper Lake and Ice Lake are to be dual die, with 6 UPI links.
Should clarify that this is referring to server parts. via Reddit
We can expect the launch of this part sometime in 2019 but that pushes the launch of Ice Lake-SP family to 2020 and beyond, based on the current state of the 10nm process which isn't expected to hit HVM (High Volume Manufacturing) till mid-2019.
Intel Ice Lake-SP/AP (10mm+) Xeon Family
The Ice Lake-SP processors will be based on the 10nm+ process node, offering support on the Whitley platform with a range of new features and the obvious switch to a new socket/chipset (LGA 4189, 8 Channel Memory). The chip will compete against the AMD Zen 3 based Milan CPUs which by that time would be available in the market.
The main problem for Intel currently is that AMD is already saying that their upcoming EPYC 'Rome' 7nm processors were designed with Ice Lake-SP (10nm+) in mind and will compete favorably with them. But Intel isn't launching Ice Lake-SP next year considering the dire state of the 10nm process and we will only have Cascade Lake-SP / AP, putting AMD in a very strong lead. It will be interesting to see who Intel hires as their new CEO and what plan he delivers against the emerging EPYC threat which isn't going anywhere in the long term for chipzilla.
Intel Xeon SP Families:
|Family Branding||Skylake-SP||Cascade Lake-SP/AP||Cooper Lake-SP||Ice Lake-SP||Sapphire Rapids||Granite Rapids|
|Platform Name||Intel Purley||Intel Purley||Intel Cedar Island||Intel Whitley||Intel Eagle Stream||Intel Eagle Stream|
|MCP (Multi-Chip Package) SKUs||No||Yes||No||Yes||TBD||TBD|
|Socket||LGA 3647||LGA 3647|
|LGA 4189||LGA 4189||LGA 4677||LGA 4677|
|Max Core Count||Up To 28||Up To 28|
Up To 48
|Up To 28||TBD||TBD||TBD|
|Max Thread Count||Up To 56||Up To 56|
Up To 96
|Up To 56||TBD||TBD||TBD|
|Max L3 Cache||38.5 MB L3||38.5 MB L3|
66 MB L3
|38.5 MB L3||TBA (1.5 MB Per Core)||TBD||TBD|
|Memory Support||DDR4-2666 6-Channel||DDR4-2933 6-Channel|
DDR4 2933 12-Channel
|Up To 6-Channel DDR4-3200||Up To 8-Channel DDR4-3200||8-Channel DDR5||8-Channel DDR5|
|PCIe Gen Support||PCIe 3.0 (48 Lanes)||PCIe 3.0 (48 Lanes)||PCIe 3.0 (48 Lanes)||PCIe 4.0 (64 Lanes)||PCIe 5.0||PCIe 5.0|
|3D Xpoint Optane DIMM||N/A||Apache Pass||Barlow Pass||Barlow Pass||Crow Pass||Donahue Pass|
|Competition||AMD EPYC Naples 14nm||AMD EPYC Rome 7nm||AMD EPYC Rome 7nm||AMD EPYC Milan 7nm+||AMD EPYC Genoa ~5nm||AMD Next-Gen EPYC (Post Genoa)|
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