AMD has made over $10b in investments to its strategic partners across Taiwan as it's inches away from deploying 6th Gen EPYC & MI450X inside its Helios AI racks.
AMD Preps For The AI Supercycle With Multi-Billion Dollar Investments Aimed at Multi-GW Data Centers
As the next chapter of AI takes the world by storm, leading tech companies are prepping their latest platforms while working simultaneously with partners to ensure a steady supply to meet their targets.
Today, AMD announces its readiness to cater to this growing AI demand by pooling in over $10 billion worth of investments towards the Taiwan ecosystem and its regional partners who will soon be supplying one of the fastest AI Racks on the market to date, codenamed Helios. This powerful rack, designed purely for AI, houses the company's latest 6th Gen EPYC CPUs codenamed Venice, and the Instinct MI450X AI GPUs.
- More than $10 billion in investments across the Taiwan ecosystem to expand strategic partnerships and scale advanced packaging capabilities for AI infrastructure
- Industry-leading EFB-based 2.5D packaging to enable higher interconnect bandwidth and efficiency in 6th Gen AMD EPYC CPUs, codenamed “Venice.”
- AMD Helios rack-scale platform with “Venice” and AMD Instinct MI450X GPUs on track for multi-gigawatt deployments beginning 2H 2026
AMD is working with various "strategic" Taiwanese partners, which include ODMs such as Sanmina, Wiwynn, Wistron, and Inventec, alongside SPIL, PTI, Unimicron, AIC, Nan Ya PCB, and Kinsus, who will be building & shipping the latest Helios AI Racks, setting the stage for its Agentic AI roadmap.
Press Release: To meet the growing demand for AI infrastructure, AMD today announced more than $10 billion in investments across the Taiwan ecosystem to expand strategic partnerships and scale advanced packaging manufacturing for next-generation AI infrastructure.
Working with strategic partners in Taiwan and globally, AMD is advancing leading-edge silicon, packaging, and manufacturing technologies that enable higher performance, greater efficiency, and faster deployment of AI systems. These efforts build on AMD’s deep ecosystem partnerships and long-standing leadership in chiplet architectures, high-bandwidth memory integration, 3D hybrid bonding, and rack-scale system design for next-generation AI infrastructure.
“As AI adoption accelerates, our global customers are rapidly scaling AI infrastructure to meet growing compute demand,” said Dr. Lisa Su, Chair and CEO, AMD. “By combining AMD leadership in high-performance computing with the Taiwan ecosystem and our strategic global partners, we are enabling integrated, rack-scale AI infrastructure that helps customers accelerate deployment of next-generation AI systems.”
Today’s investment announcement demonstrates how AMD is extending its leadership through strategic partnerships that advance silicon, packaging, and manufacturing innovations required for next-generation AI infrastructure:
- EFB ecosystem development: AMD is collaborating with Taiwan-based ASE and SPIL, as well as other industry partners, to develop and qualify next-generation wafer-based 2.5D bridge interconnect technology. EFB architecture increases interconnect bandwidth and improves power efficiency, supporting “Venice” CPUs. These improvements translate into faster, more efficient systems capable of delivering greater performance-per-watt while operating within real-world power and cooling constraints.
- Panel-based innovation with PTI: AMD has achieved a major milestone with PTI by qualifying the industry’s first 2.5D panel-based EFB interconnect. The technology supports high-bandwidth interconnect at scale, allowing customers to deploy more efficient AI systems while improving overall economics.
Together, these advancements reinforce AMD’s leadership in delivering high-performance AI infrastructure at scale. By combining silicon innovation with a robust global ecosystem, AMD is enabling customers to accelerate the deployment of the next generation of AI systems.
About the author: A Software Engineer by training and a PC enthusiast by passion, Hassan Mujtaba serves as Wccftech's Senior Editor for hardware section. With years of experience in the industry, he specializes in deep-dive technical analysis of next-generation CPU and GPU architectures, motherboards, and cooling solutions. His work involves not only breaking news on upcoming technologies but also extensive hands-on reviews and benchmarking.
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