TSMC To Begin 10nm Volume Production In First Quarter of 2017

A comparison between 300mm and 450mm wafers - the shift to the latter will result in increased economies of scale.

Pure-play foundries are very important to the PC hardware industry, and well, the tech industry in general. It is these guys which make all the silicon chips you will find in pretty much any chip based technology. Since Intel mostly utilizes its foundries for itself, Samsung, GloFo and TSMC are the primary pure-play foundries around and have decided that the process node after 14nm/16nm FinFET is going to be 10nm FinFET. As I always mention, this is not the same node as Intel's and does not equate to a true 10nm node but is certainly smaller than 14nm FinFET and will offer a wide variety of performance and power efficiency gains.

TSMC will start mass production of 10nm in Q1 2017, process will be ready for high-performance ASICs in a year

According to official statements by TSMC, the 10nm FinFET process will offer 50% die scaling, along with a 20% performance increase (or 40% power reduction). It aims to provide a reasonably high amount of contact pitch density. The company entered trial production for 10nm this year and as always, is already working on Apple's latest chips. That said, they have yet to start volume production for 10nm, and that is scheduled to begin in the first quarter of 2017.

This is great news because it means that we can expect the technological capability for 10nm GPUs as early as 1H 2018 (assuming everything goes smoothly). This is because it usually takes about a year for a process to mature to the point where high-performance ASICs can be fabricated with a decent yield ratio. There was some speculation that the company has run into trouble on the 10nm FinFET node but TSMC has repudiated all such claims and states that everything is well on track.

This is something that, if true, would be deja vu since if I were to make a very simplified approximation then Intel's 14nm process equates to the TSMC 10nm FinFET process and we already know that the blue giant ran into trouble at this particular node shrink - even though it was expecting no resistance. TSMC will be using a 14nm backbone for its 10nm FinFET process and it wouldn't surprise anyone if it ran into trouble. That said, if everything is on track then we expect production to ramp to volume in the first quarter of 2017. Making the process ready for trial production of high-performance ASICs by year end.

50% die scaling with a 40% reduction in power means that we could be seeing a huge amount of performance gains over the next year or so. Remember that the 16nm FinFET process isn't even maxed out yet for mainstream GPUs - even the 1080 Ti will be based on a 471mm2 die whereas the GTX 1080 is based on an even smaller version. The limit of TSMC's 300mm wafers is approximately 600mm2 for those interested, so we have a lot of headroom in our current process and a new one in the pipeline. Unlike the 28nm node, it looks like we are going to be enjoying consistent performance increases for the next few years at least.


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