NVIDIA’s Vera CPU Slashes Chip Verification Times at Cadence and Synopsys by 1.5x, Speeding Next-Gen Silicon

NVIDIA accelerates next-gen CPU and GPU chip designs with its Vera CPUs, delivering a 50% boost to improve system-level processes.

Cadence & Synopsys Are Leveraging NVIDIA's Vera CPUs To Accelerate Their Chip-Making Processes

NVIDIA's CUDA-X libraries & cuLitho software are already enabling faster chip design while significantly reducing lithography costs. Now, NVIDIA is working with chip designers & industry partners to optimize Electronic Design Automation (EDA) applications using its Vera CPUs.

The key EDA processes include Simulation, Verification, and Implementation. These three are the most crucial steps before a chip is sent for manufacturing. During these processes, engineers are focused on validating the various behaviors of the chip & continue to refine/optimize the design.

Most of these processes are heavily reliant on CPU performance, hence requiring faster cores and efficient memory systems, and Vera gives these processes an impeccable upgrade in all regards.

As per the initial tests done on NVIDIA's Vera CPUs, the chip was able to provide up to a 1.5x boost in performance:

• Cadence Jasper, a formal verification platform, uses smart proof technology and machine learning to find and fix bugs and improve verification productivity early in the design cycle.
• Synopsys VCS, a high-performance functional verification solution used to simulate and validate complex chip designs before fabrication, used the same number of cores in the test. 

Vera's faster execution reduces the time taken during individual verification runs, delivering higher throughput that allows engineers and firms to evaluate more design alternatives and complete more validation within the same development window.

After the initial processes, the behavior of the chip is described in the register-transfer level (RTL) stage. The RTL processes include logic simulation, formal verification, regression testing, & digital implementation.

NVIDIA Agent Toolkit capabilities include:

• AI physics skills: NVIDIA PhysicsNeMo libraries help agents train and deploy customizable AI physics models for complex design and simulation tasks, turning model architectures into callable tools for engineering workflows.
• Iterative sparse solvers: New NVIDIA cuISS (CUDA Iterative Sparse Solvers) library accelerates large sparse linear systems in physics-based and engineering simulations. Designed for flexibility and performance on GPUs, its modern, composable solvers and preconditioners help developers build scalable, production simulation engines for agentic engineering workflows. 
• Direct sparse solvers: NVIDIA cuDSS (CUDA Direct Sparse Solvers) accelerates large, complex sparse linear systems central to electronic design automation (EDA) and scientific simulation. It delivers high performance and numerical robustness for critical workloads like device, circuit, and system simulations with scalability to multi-GPU and multi-node deployments in production environments.
• Quantum chemistry: NVIDIA cuEST (CUDA Electronic Structure Theory) brings high-accuracy quantum chemistry simulations to device-relevant scales, enabling density functional theory (DFT) and post-DFT methods to be integrated into production workflows at scale. cuEST brings production value to customers by supporting a wide range of modern functionals and making increasingly large ground-state and excited-state simulations manageable on NVIDIA GPUs.

The Nemotron 3 Ultra Open AI models also bring agentic coding advanced to chip design with higher accuracy and deep domain expertise for RTL coding.

All in all, NVIDIA's Vera CPUs bring the capabilities to EDA and RTL processes with accelerated capabilities, faster throughput across several algorithms, and at higher efficiency. NVIDIA is also working on its next-generation Rosa CPUs with the Rigel core architecture, which will continue to optimize leading EDA applications, and these chips will be a key enabler of NVIDIA's own CPUs & GPUs coming in the future.

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