AMD Unveils Helios, Its Next-Gen AI Powerhouse With MI455X & 6th Gen EPYC, Challenging NVIDIA’s Rack-Scale Dominance

Hassan Mujtaba
A server room features an AMD Helios system with visible 'AMD EPYC,' 'AMD INSTINCT,' and 'AMD PENSANDO' modules.

AMD has unveiled its next-generation Helios AI Rack, which aims to become the leading solution for frontier AI and sovereign computing, powered by its MI455X GPUs and 6th Gen EPYC CPUs.

AMD's Helios AI Racks Are A Sight To Behold: Combining Next-Generation Instinct GPUs, EPYC CPUs, & Pensando Networking Chips For Large-Scale Inferencing

It was last year at Advancing AI 2025 when AMD gave us the first glimpse at its Helios AI rack, a solution designed to meet the growing demands of AI workloads in the Agentic era. After giving us the official unveiling, we got to see the first Helios platforms in the flesh at OCP 2025. And this year, we got to see Helios Rack on full display at the Computex show floor.

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The plan is simple: to roll out the platform that is the best at AI and disrupts the current market hierarchy dominated by NVIDIA's existing Oberon and upcoming Kyber racks. This will be AMD's first full-stack rack-level solution for AI and brings AMD's open standards to the industry. But the Helios AI rack isn't just a standard rack with some hardware components; full stack means full stack, and AMD has deployed its latest and greatest to ensure that firms using Helios get the full taste of its capabilities.

Although AMD's Helios AI Rack will officially launch at the Advancing AI 2026 event, the company has officially disclosed the full platform details, so we decided to give you all a detailed rundown. There are three key components of the Helios AI rack:

  • AMD Instinct MI455X GPUs
  • 6th Gen AMD EPYC CPUs
  • AMD Pensando AI NICs

CNBC got a real nice close-up of these chips, which you can see below:

There are several other technologies that power Helios, which include:

  • AMD Pensando DPU
  • AMD Infinity Fabric
  • AMD ROCm Software Stack

So let us start by looking at the key components that power the AMD Helios AI platform.

AMD Instinct MI455X - The Inference GPU Powerhouse For Helios

The AMD Instinct MI400 series are the GPUs that will power the Helios AI rack. These GPUs are based on the latest CDNA 5 architecture, which brings:

  • Increased HBM4 Capacity & Bandwidth
  • Expanded AI Formats with Higher Throughput
  • Standard-Based Rack-Scale Networking (UALoE, UAL, UEC)

For the Instinct MI400 series, AMD will have three products; the first two are the Instinct MI455X & the MI450X, which are aimed at scale AI Training & Inference workloads. The MI455X is powering the Helios rack. The third chip is the MI430X, which is aimed at HPC & Sovereign AI workloads, featuring the "highest performance" FP64 capabilities, hybrid compute (CPU+GPU), and the same HBM4 memory as the MI455X.

The AMD Instinct MI455X is a 40 PFLOPs of FP4 & 20 PFLOPs FP8 compute, which is double the compute capability of the MI350 series, making it a disruptive offering for AI. For comparison, an NVIDIA Rubin GPU offers 50 PFLOPs of FP4 and 17.5 PFLOPs of FP8 compute.

In addition to the compute capability, AMD is also going to leverage HBM4 memory for its Instinct MI400 series. The new chip will offer a 50% memory capacity uplift from 288GB HBM3e to 432GB HBM4. The HBM4 standard will offer a massive 19.6 TB/s bandwidth, more than double that of the 8 TB/s for the MI350 series. For comparison, the Rubin GPU comes with 288 GB of HBM4 at 22 TB/s.

AMD Instinct AI Accelerators:

Accelerator NameAMD Instinct MI500AMD Instinct MI400AMD Instinct MI350XAMD Instinct MI325XAMD Instinct MI300XAMD Instinct MI250X
GPU ArchitectureCDNA 6CDNA 5CDNA 4Aqua Vanjaram (CDNA 3)Aqua Vanjaram (CDNA 3)Aldebaran (CDNA 2)
GPU Process Node2nm2nm+3nm3nm5nm+6nm5nm+6nm6nm
XCDs (Chiplets)TBD8 (MCM)8 (MCM)8 (MCM)8 (MCM)2 (MCM)
1 (Per Die)
GPU CoresTBDTBD16,38419,45619,45614,080
GPU Clock Speed (Max)TBDTBD2400 MHz2100 MHz2100 MHz1700 MHz
INT8 ComputeTBDTBD5200 TOPS2614 TOPS2614 TOPS383 TOPs
FP6/FP4 MatrixTBD40 PFLOPs20 PFLOPsN/AN/AN/A
FP8 MatrixTBD20 PFLOPs5 PFLOPs2.6 PFLOPs2.6 PFLOPsN/A
FP16 MatrixTBD10 PFLOPs2.5 PFLOPs1.3 PFLOPs1.3 PFLOPs383 TFLOPs
FP32 VectorTBDTBD157.3 TFLOPs163.4 TFLOPs163.4 TFLOPs95.7 TFLOPs
FP64 VectorTBDTBD78.6 TFLOPs81.7 TFLOPs81.7 TFLOPs47.9 TFLOPs
VRAMHBM4E432 GB HBM4288 GB HBM3e256 GB HBM3e192 GB HBM3128 GB HBM2e
Infinity CacheTBDTBD256 MB256 MB256 MBN/A
Memory ClockTBD19.6 TB/s8.0 Gbps5.9 Gbps5.2 Gbps3.2 Gbps
Memory BusTBDTBD8192-bit8192-bit8192-bit8192-bit
Memory BandwidthTBDTBD8 TB/s6.0 TB/s5.3 TB/s3.2 TB/s
Form FactorTBDTBDOAMOAMOAMOAM
CoolingTBDPassive / LiquidPassive / LiquidPassive CoolingPassive CoolingPassive Cooling
TDP (Max)TBDTBD1400W (355X)1000W750W560W

AMD 6th Gen EPYC Venice - The Host CPU For Helios & The First Zen 6 On Market

The other key component, and the one that is really shaping up as the king of the Agentic AI era, is the CPU. For Helios, AMD is leveraging its brand new Zen 6 core architecture that will be used on its 6th Gen EPYC CPUs, codenamed Venice. AMD's EPYC Venice chips are the first HPC product to enter volume production on TSMC's 2nm process technology, and their readiness for Helios AI racks proves that AMD will always deliver the best of the best for its high-performance customers.

The TSMC 2nm process technology transitions from FinFET to Nanosheet transistors (GAA), and offers 10-15% higher performance at the same power, 25-30% lower power consumption at the same performance, and up to 15% higher transistor density.

AMD's 6th Gen EPYC Venice CPUs were teased earlier this year at CES, offering up to 256 cores and 512 threads with eight massive compute dies and two even larger I/O dies. For this chip, AMD has promised over 70% performance & efficiency improvement with its EPYC Venice CPUs, with a >30% increase in thread density.

Once again, the requirement for high-performance CPUs has risen tenfold with Agentic AI workloads. And competitors are firing across all cylinders with CPUs that are optimized around agents. Just like GPUs, NVIDIA is AMD's primary competitor in this space, which is leveraging Vera CPUs based on its custom Arm IP to power the Vera Rubin NVL72 racks. AMD's Helios AI racks powered by Zen 6 EPYC chips not only offer more cores, but faster performance and improved single-core capabilities, which is important for sustained throughput.

In early benchmarks, AMD has shown that not only do its 5th Gen Turin "Zen 5" CPUs lead against Vera, but the 6th Gen Venice "Zen 6" chips lead massively, driving more performance & offering better TCOs at a similar power scale.

AMD EPYC CPU Families:

Family NameAMD EPYC VeranoAMD EPYC VeniceAMD EPYC Turin-XAMD EPYC Turin-DenseAMD EPYC TurinAMD EPYC SienaAMD EPYC BergamoAMD EPYC Genoa-XAMD EPYC GenoaAMD EPYC Milan-XAMD EPYC MilanAMD EPYC RomeAMD EPYC Naples
Family BrandingEPYC 9007EPYC 9006EPYC 9005EPYC 9005EPYC 9005EPYC 8004EPYC 9004EPYC 9004EPYC 9004EPYC 7004EPYC 7003EPYC 7002EPYC 7001
Family Launch2027202620252025202420232023202320222022202120192017
CPU ArchitectureZen 7Zen 6Zen 5Zen 5CZen 5Zen 4Zen 4CZen 4 V-CacheZen 4Zen 3Zen 3Zen 2Zen 1
Process NodeTBD2nm TSMC4nm TSMC3nm TSMC4nm TSMC5nm TSMC4nm TSMC5nm TSMC5nm TSMC7nm TSMC7nm TSMC7nm TSMC14nm GloFo
Platform NameSP7SP7SP5SP5SP5SP6SP5SP5SP5SP3SP3SP3SP3
SocketTBDTBDLGA 6096 (SP5)LGA 6096 (SP5)LGA 6096LGA 4844LGA 6096LGA 6096LGA 6096LGA 4094LGA 4094LGA 4094LGA 4094
Max Core CountTBD9612819212864128969664646432
Max Thread CountTBD19225638425612825619219212812812864
Max L3 CacheTBDTBD1536 MB384 MB384 MB256 MB256 MB1152 MB384 MB768 MB256 MB256 MB64 MB
Chiplet DesignTBD8 CCD's (1 CCX per CCD) + 2 IOD?16 CCD's (1CCX per CCD) + 1 IOD12 CCD's (1CCX per CCD) + 1 IOD16 CCD's (1CCX per CCD) + 1 IOD8 CCD's (1CCX per CCD) + 1 IOD12 CCD's (1 CCX per CCD) + 1 IOD12 CCD's (1 CCX per CCD) + 1 IOD12 CCD's (1 CCX per CCD) + 1 IOD8 CCD's (1 CCX per CCD) + 1 IOD8 CCD's (1 CCX per CCD) + 1 IOD8 CCD's (2 CCX's per CCD) + 1 IOD4 CCD's (2 CCX's per CCD)
Memory SupportTBDDDR5-12800DDR5-6000?DDR5-6400DDR5-6400DDR5-5200DDR5-5600DDR5-4800DDR5-4800DDR4-3200DDR4-3200DDR4-3200DDR4-2666
Memory ChannelsTBD16-Channel (SP7)12 Channel (SP5)12 Channel12 Channel6-Channel12 Channel12 Channel12 Channel8 Channel8 Channel8 Channel8 Channel
PCIe Gen SupportTBD128-192 PCIe Gen 6TBD128 PCIe Gen 5128 PCIe Gen 596 Gen 5128 Gen 5128 Gen 5128 Gen 5128 Gen 4128 Gen 4128 Gen 464 Gen 3
TDP (Max)TBD~600W500W (cTDP 600W)500W (cTDP 450-500W)400W (cDP 320-400W)70-225W320W (cTDP 400W)400W400W280W280W280W200W

AMD Pensando "Vulcano" AI NICs & Pensando "Salina" DPU - Enabling Heightened Scale-Up & Scale-Out Networking/Fabric Solutions

Networking and Fabric play a core role in shaping data center and enterprise solutions. AMD's Pensando stack delivers these technologies, and Helios is fitted with the latest Vulcano 800 AI NIC & Salina DPU, which rival NVIDIA's ConnectX-8 and Bluefield 3/4 DPUs.

Starting with the AMD Pensando "Vulcano" 800 AI NIC, this is an 800 Gbps high-performance switch with 800 Gbps Ethernet network throughput. It is currently the only NIC to offer up to 2.4 Tbps of scale-out bandwidth per GPU, backed by full hardware and software programmability. Each GPU gets access to up to 8x the scale-out bandwidth, and with a UAL / PCIe Gen6 host interface, Helios drives super-low-latency communication between the GPUs. Vulcano is also UEC-ready with an RDMA Ethernet that is optimized for large-scale AI clusters.

The scale-up fabric is built on an open networking approach, leveraging UALink over Ethernet (UALoE) to deliver high-bandwidth, low-latency GPU connectivity at rack scale. The fabric provides seamless interconnect for up to 72 GPUs, which is the full GPU count that each Helios AI rack supports.

The AMD Pensando DPU bridges the AI servers to enterprise networks, accelerating network, security, and storage offloads to boost AI server efficiency. The Salina DPU features 16 Arm N1 cores that are used for offloading networking, security, and storage for front-end server-to-client connectivity. Each Salina DPU offers a 40% speed-up versus CPU-only processing and is twice as capable as AMD's prior generation DPUs while offering 40% performance uplifts versus NVIDIA's BlueField-3 DPUs.

Helios - The Ultimate AI Rack From The High-Performance Leaders

With all three core components outlined, we now want to shed some light on how Helios AI racks bring them together.

The AMD Helios AI Rack makes use of Meta's Open Rack Wide standard submitted to the OCP (Open Compute Project). The Helios rack is a fully liquid-cooled design with 18 compute trays with six switches, and each tray features four Instinct MI455X GPUs and a single EPYC Venice "Zen 6" CPU. The system leverages AMD's Pensando "Salina" 400 DPU & the Pensando "Vulcano" 800 AI NIC for networking and interconnection.

Each AMD EPYC Venice "Zen 6" CPU comes with up to 256 cores based on the Zen 6C architecture, and each Instinct MI455X GPU packs several thousand compute units. There are a total of 72 GPUs onboard the Helios AI Rack. Each GPU is placed under a liquid cold plate made out of copper.

All put together, the Helios AI rack weighs roughly 5000 pounds and costs around $5-$5.5 million, as per CNBC. Each rack will consume around 225-245kW of power.

The Helios rack scales up to 2.9 Exaflops of FP4 compute, 1.4 Exaflops of FP8 compute, 31 TB of HBM4 memory, 1.4 PB/s of aggregate bandwidth, 43 TB/s of scale-out bandwidth, 260 TB/s of scale-up interconnect bandwidth, and up to 4600 CPU + 18,000 GPU cores. All of these enable Helios to deliver a generational leap for trillion-parameter model training and large-scale AI inference.

Comparison Table

FeatureAMD HeliosNVIDIA Vera Rubin NVL72 (Oberon)
GPUs per Rack72 × AMD Instinct MI455X (CDNA 5 architecture)72 × NVIDIA Rubin
GPU Memory (per GPU)432 GB HBM4288 GB HBM4
Total GPU Memory31 TB HBM420.7 TB HBM4
GPU Memory Bandwidth (per GPU)19.6 TB/s22 TB/s
Total GPU Memory Bandwidth~1,411 TB/s (calculated)1,580 TB/s
Peak AI Performance (Rack)2.9 EFLOPS (MXFP4/FP4) 1.4 EFLOPS (MXFP8/FP8)3.6 EFLOPS NVFP4 (Inference) 2.52 EFLOPS NVFP4 (Training)
CPUs per Rack18 × 6th Gen AMD EPYC (Zen 6 / "Venice") (CPU domain: Up To 256 cores per CPU)36 × NVIDIA Vera (custom Arm Olympus cores) Total: 3,168 cores (88 cores/CPU)
Scale-up Interconnect260 TB/s (UALink over Ethernet / UALoE)260 TB/s (NVLink 6)
Scale-out Networking43 TB/s (Ultra Ethernet Consortium-ready, AMD Pensando Vulcano 800G AI NICs + Salina DPU)28.8 TB/s (Spectrum-X Ethernet, ConnectX-9 SuperNICs + BlueField-4 DPUs)
CoolingLiquid cooling (rack-ready, manifold with quick-disconnects)Liquid cooling (NVIDIA MGX modular, cable-free tray design)
Software EcosystemAMD ROCm (open), native support for PyTorch, JAX, ONNX, vLLM, Triton; Day-0 model support; multivendor interoperabilityNVIDIA CUDA + full stack (AI Enterprise, Mission Control, etc.); dominant ecosystem
Standards & OpennessOpen (OCP Open Rack Wide, UEC, open hardware/software standards); designed for flexibility and reduced vendor lock-inNVIDIA-centric with broad partner ecosystem (MGX); proprietary elements (e.g., NVLink) but highly optimized
Key DifferentiatorsHigher total HBM4 capacity (better for large models/context); higher scale-out bandwidth; open ecosystem for innovation and choiceHigher peak FLOPS in low-precision formats; strong efficiency claims (e.g., ~10x inference cost/token vs. prior gen); mature software & in-network compute
Status / TimelineReference design (shared with partners); volume deployments expected 2H 2026Ramping into full production; deployments targeted for 2026

Software Stack & An Impressive Line of First Customers

ROCm is AMD's industry standard for AI and HPC. Being the direct competitor to NVIDIA's CUDA, AMD has come a long way with its ROCm stack, now in v7.14. ROCm brings open hardware and software standards that reduce integration complexity and accelerate AI deployment across all AMD platforms.

For Helios, AMD is bringing native support for leading frameworks such as PyTorch, TensorFlow, JAX, Hugging Face, vLLM, SGL, Deepspeed, ONNX, llm-d, OpenXLA, MLID, Llama Stack, and many more with Day-0 support.

And now, coming to why this all matters. The explosive demand for Agentic AI has led to increased demand for more compute, and Helios brings with it some massive capabilities. Today, AMD and Microsoft announced that Helios Rackscale solutions will be deployed for its customers and also to support Azure AI services. The following are some of the Azure instances that will be offered by Microsoft:

  • Azure HDv2 (CPU-Focused) - Nearly 500 6th Gen EPYC CPU Cores, 4 TB RAM, 32 TB NVMe Storage, 400 Gb Azure Boost Networking
  • Azure HXv2 (Agentic AI Driver) - 176 6th Gen EPYC CPU Cores per VM (3D V-Cache, 5 GHz+ Clocks, 50% More Cache), 2-4 TB RAM, 800 Gb Infiniband
  • ND MI455X v7 (Helios Rack) - 72 MI455X GPUs, 6th Gen AMD EPYC CPUs

Besides Microsoft, AMD has also announced various customers for its Helios AI Rackscale solutions, 6th Gen EPYC CPUs, and MI455X GPUs, which include OpenAI, META, Oracle, HPE, TCS, Celestica, Nutanix, US DOE.

AMD's Helios AI Rack represents a bold and comprehensive leap forward in the Agentic AI era, delivering a fully integrated, open-standards rack-scale platform that combines cutting-edge Instinct MI455X GPUs, powerful 6th-Gen EPYC Venice CPUs, and advanced Pensando networking technologies into a liquid-cooled powerhouse. With superior HBM4 memory capacity, exceptional scale-up and scale-out bandwidth, and a mature ROCm software ecosystem offering broad framework support, Helios is positioned to challenge the established order by providing higher memory density, greater flexibility, and compelling performance-per-dollar advantages over competing solutions.

Backed by an impressive roster of early adopters including Microsoft, OpenAI, Meta, and Oracle, this innovative system promises to accelerate trillion-parameter model training and large-scale inference while fostering a more open and interoperable AI infrastructure. As it prepares for official launch at Advancing AI 2026 in just a few days, Helios underscores AMD’s commitment to high-performance leadership and stands as a compelling testament to the rapid evolution of AI hardware.

Hassan Mujtaba Photo

About the author: A Software Engineer by training and a PC enthusiast by passion, Hassan Mujtaba serves as Wccftech's Senior Editor for hardware section. With years of experience in the industry, he specializes in deep-dive technical analysis of next-generation CPU and GPU architectures, motherboards, and cooling solutions. His work involves not only breaking news on upcoming technologies but also extensive hands-on reviews and benchmarking.

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