AMD EPYC “Venice” Gives Us A Preview of Zen 6-Based Ryzen “Olympic Ridge” CPUs: More Cores, More (3D V-)Cache, Clocks & Scalable Configs

AMD has launched its first Zen 6 CPUs, the EPYC Venice, and we use them to analyze what we can expect from the Ryzen "Olympic Ridge" lineup.

AMD Ryzen "Olympic Ridge" Desktop CPUs Analyzed Using EPYC "Venice" Specifications, Zen 6 Brings The Next Oomph To AM5 Desktops

It is surprising how AMD has evolved its strategy over the years. When the first Zen architecture launched, it was released for desktop PCs. The 1st Gen EPYC family, codenamed Naples, wouldn't arrive till a few months later. This has been the case for all Zen launches so far: Ryzen launches first, followed by EPYC, but with Zen 6, this has changed.

The Zen 6-based EPYC Venice family has launched, and the Ryzen family will be launching several months later in early 2027. You can think of AI being a major factor in this decision by AMD. We've seen how big a demand there is for compute, and we have also seen how the PC segment isn't in its greatest shape at the moment due to rising component prices & stringent shortages across all sectors.

So AMD's decision kind of makes sense, but despite all of that, Ryzen Desktop CPUs remain a crucial market for the chipmaker, and there are a lot of enthusiasts who are waiting to see what AMD has in store for them with the next-gen lineup. We have detailed some aspects of next-generation Ryzen CPUs, but the EPYC "Zen 6" lineup gives us even more clues to where Ryzen might be heading next.

Zen 6 Brings More Cores, Enabling Up To 24 Cores For Ryzen

The first detail that we can confirm now is that AMD's Zen 6 will feature more cores and threads.

Since AMD Zen 1 and Zen 2, the Ryzen family peaked at 8 cores and 16 threads. Each of these Zen architectures featured a single CCD (Compute Core Die), which included two CCX (Compute Core Complex). The first two generations had 16 MB of L2 cache dedicated to each CCX, so while these CCXs resided on the same CCD, they didn't have true "Share LLC".

This changed with Zen 3, Zen 4, and Zen 5 generations, which transitioned to the modern-day CCD design, more full, and packing up to 16 cores with 32 threads. Each of these featured 8 cores per CCD, and since the CCX became the CCD itself, it meant that the full 32 MB cache could now be shared across the chips. So you went from 8 cores to 16 cores, & from 16 MB cache to 32 MB cache (Pre-Zen 3 Ryzens had 1 CCD with two 16 MB CCXs, whereas Zen 3 & above have two CCDs with 32 MB per die).

But we have been through three generations of Zens without any major core or cache uplift. The 3D V-Cache options did bring more cache, but the core configuration got stagnant. Now with Zen 6, we will see a major change. Once again, AMD will retain the same two CCD & one IOD structure for Zen 6-based Ryzen CPUs.

First of all, AMD has confirmed that Zen 6 will feature two variants: Zen 6 with 12 cores per die and Zen 6C with 16 cores per die. The Zen 6C flavor is going to be exclusive to the enterprise & HPC segment, so that gives us 12 cores per die. And the base EPYC 9016, an 8-core chip, confirms that Zen 6 has 48 MB of cache per CCD. So besides a 50% increase in core count, Zen 6 also gets a 50% increase in cache.

Two Zen 6 CCDs means that the flagship Ryzen "Olympic Ridge" Desktop CPU would offer up to 24 cores, 48 threads, and 96 MB of L3 cache, while a single CCD variant will offer up to 12 cores, 24 threads, and 48 MB of L3 cache.

Zen Architecture(s)	Zen 6 (Ryzen)	Zen 3 - Zen 5 (Ryzen)	Zen 1 - Zen 2 (Ryzen)
Max CCDs	2	2	1
Max IODs	1	1	0
Max Cores per CCD	12	8	4
Max Cores per Chip	24	16	8
Max L3 per CCD	48 MB	32 MB	32 MB (16 per CCX)
Max L3 per Chip	96 MB	64 MB	32 MB

So if we compare Zen 6 to Zen 5, we will be getting:

• +50% More Cores
• +50% More Threads
• +50% More Cache

From previous details, it is expected that Ryzen "Olympic Ridge" CPUs will scale across several SKUs with various core counts and caches:

• Zen 6 (Single-CCD) - 6 Core
• Zen 6 (Single-CCD) - 8 Core
• Zen 6 (Single CCD) - 10 Core
• Zen 6 (Single CCD) - 12 Core
• Zen 6 (Dual CCD) - 16 Core (8+8)
• Zen 6 (Dual CCD) - 20 Core (10+10)
• Zen 6 (Dual CCD) - 24 Core (12+12)

Clock Speeds Go Up

Now for the clock speeds, AMD's Zen 6 CPUs are expected to further raise the frequency ceiling, and that can be seen on many 6th Gen EPYC CPUs already. The standard Zen 6 CPUs are dialing up to 5.00 GHz, and upcoming V-Cache flavors will feature a 5.15 GHz clock.

Now the comparison with EPYC CPUs isn't straightforward, as server chips have stricter power profiles & are designed with endurance/stability in mind. Desktop CPUs feature much higher clocks as they are more flexible with clocks, power (TDP/PPT), platform, and the chip itself, which shares that power budget with massive IO dies.

So we compare the generational uplifts of Zen 6 "EPYC" with Zen 5 "EPYC".

EPYC 9006	Base / Boost	EPYC 9005	Base / Boost	Base Uplift	Boost Uplift
EPYC 9016	3.05 / 4.80	EPYC 9015	3.60 / 4.10	0.847x	1.170x
EPYC 9116	2.85 / 4.50	EPYC 9115	2.60 / 4.10	1.096x	1.097x
EPYC 9176F	3.90 / 5.00	EPYC 9175F	4.20 / 4.55	0.928x	1.098x
EPYC 9276F	3.80 / 5.00	EPYC 9275F	4.10 / 4.50	0.926x	1.111x
EPYC 9336	3.15 / 3.70	EPYC 9335	3.00 / 4.40	1.050x	0.840x
EPYC 9356	3.60 / 4.50	EPYC 9355	3.55 / 4.40	1.014x	1.022x
EPYC 9376F	3.80 / 5.00	EPYC 9375F	3.80 / 4.40	1.000x	1.136x
EPYC 9646	2.80 / 3.70	EPYC 9455	3.15 / 4.40	0.888x	0.840x
EPYC 9476F	3.65 / 5.00	EPYC 9475F	3.65 / 4.80	1.000x	1.041x
EPYC 9536	3.25 / 4.00	EPYC 9535	2.40 / 4.30	1.354x	0.930x
EPYC 9576F	3.55 / 5.00	EPYC 9575F	3.30 / 5.00	1.060x	1.000x
EPYC 9746	2.90 / 4.00	EPYC 9745	2.40 / 3.45	1.208x	1.159x
			Averages	1.031x	1.037x

The maximum base clock for Zen 6 EPYC is rated at 3.90 GHz, whereas the maximum base clock for Zen 5 EPYC is rated at 3.80 GHz. The boost clocks for Zen 5 go up to 5.0 GHz, and the same is true for Zen 6, but that will change early next year when better bins arrive with 5.15 GHz clocks.

On average, comparing SKUs with the same core count, we can note a 3.1% bump in base and a 3.7% bump in boost clocks. Even with a 5.15 GHz Zen 6 SKU, the boost profile is only raised by 3 percent, which is in line with the rest of the chips. If we apply the averages to the fastest chip in the Ryzen 9000 stack, we go from 5.7 GHz to just shy of 6.0 GHz.

But let's do something else and apply the maximum boost uplifts that each core config up to 24 has on offer. The 8-core sees a 17% bump, which, if applied to an existing 8-Core AMD Ryzen 7 9850X3D, pushes the clock speeds beyond 6.5 GHz (from 5.6 GHz). A 16-core model goes from 5.6/5.7 GHz to 6.1/6.2 GHz (applying the 1.097x boost of the EPYC 9116), and for 24-core models, the max boost uplift of 1.11x should push boost clocks up to 6.2-6.3 GHz.

Quick Side Node - AMD EPYC Venice (Zen 6 Classic) is based on N2P, whereas EPYC Turin (Zen 5 Classic) is based on N4X. For Ryzen, the Olympic Ridge (Zen 6 Classic) will feature the same N2P process node, while existing Granite Ridge (Zen 5 Classic) CPUs feature the N4P node. N4X offers a 4% performance increase over N4P. So the node itself can add an additional boost in frequency.

Now that is assuming AMD guns for clock speed alone. If power is traded to other aspects of the chip, then we can see a more baseline set around 6-6.2 GHz, which should put Ryzen Zen 6 in the same league as Intel's Raptor Lake Refresh chips, which currently offer the highest clock speeds on desktops. Intel toned down its clock speeds with Arrow Lake, so we kind of wish to see some decent figures in next-gen lineups.

Power Consumption Going Down On 2nm

Now for power consumption, once again, the fact that EPYC is much bigger in general and features two huge IO dies means that its power characteristics will always be higher than a standard Desktop chip, but there's also a difference in terms of power management. Servers & respective CPUs rely heavily on fast and feature-rich IO capabilities, which is why the IO dies are huge, as they are on EPYC chips.

So more IO, more chiplets, more power. On Desktops, this power is managed within a lower number of chiplets, which means that more power envelope is available to the CCDs.

In return, the chips can yield higher frequency or trade off that power for extra efficiency. The balance needs to be there, but Desktop and Enthusiast chips often squeeze out every bit of headroom that is available.

The switch to TSMC's 2nm process also brings some nice improvements. From Zen 5 on TSMC 3nm to Zen 6 on 2nm, the power numbers see a drastic drop for each respective SKU under the same core count.

5th Gen SKU	TDP	6th Gen SKU	Default CPU Power	Difference
9745	400 W	9746	400 W	0%
9645	320 W	9646	300 W	−6.3%
9575F	400 W	9576F	400 W	0%
9535	300 W	9536	300 W	0%
9475F	400 W	9476F	330 W	−17.5%
9455	300 W	9456	265 W	−11.7%
9375F	320 W	9376F	285 W	−10.9%
9355	280 W	9356	250 W	−10.7%
9335	210 W	9336	195 W	−7.1%
9275F	320 W	9276F	230 W	−28.1%
9255	200 W	9256	190 W	−5%
9175F	320 W	9176F	200 W	−37.5%
9015	125 W	9016	130 W	+4%
			Average Power	-10.06%

Across all variants, we see an average -10% drop in power consumption. Only one SKU, the 8-core model, sees a +4% bump in power. This shows that Zen 6 is generally down in power but up in all performance vectors.

So while this doesn't mean that power numbers on AMD's Ryzen "Olympic Ridge" chips will go down, it does mean that Zen 6 will provide extra power headroom to be directed to the cores & that could lead to more clocks or performance.

Up To 96 MB of LLC Without 3D V-Cache & Bigger 3D V-Cache

Now for cache, we have mentioned how that is improved by 50% to 48 MB per CCD. That gets us to 96 MB on a dual CCD variant, which is the exact amount of cache as the 8-Core 3D V-Cache CPU series. This will bring a decent boost in gaming performance on non-3D V-Cache chips, but with 3D V-Cache, we can expect a bigger bump.

That's because Venice-X is packing 1152 MB of L3 cache. And that gives us an idea of what the next-gen 3D V-Cache is going to offer. Venice-X is based on the classic Zen 6 cores, so that's 48 MB of L3 cache per CCD for a total of 384 MB of standard cache across eight CCDs. That means the remaining 768 MB of L3 comes from 3D V-Cache, and that number totals at 96 MB of 3D V-Cache per CCD.

Current AMD Ryzen and EPYC CPUs feature up to 64 MB of 3D V-Cache. This amount was true for both the first and second generations of the technology. The second generation flipped the 3D stack beneath the CCD, and the same is true for the Zen 6 cores. But a 96 MB 3D V-Cache represents a 50% boost in X3D offerings.

While current 3D V-Cache CPUs still offer more cache per CCD, which improves gaming perf, a 48 MB cache still represents a nice bump over the existing 32 MB design.

This will mark the first major increase in the 3D V-Cache amount since its introduction with the Ryzen 7 5800X3D CPU. So let's bring out the numbers:

SKU	Zen 3 (Ryzen)	Zen 4 - Zen 5 (Ryzen)	Zen 6 (Ryzen)
1 CCD Cache	32 MB	32 MB	48 MB
1 CCD 3D V-Cache	64 MB	64 MB	96 MB
1 CCD Total Cache	96 MB	96 MB	144 MB
2 CCD Cache	32 MB + 32 MB	32 MB + 32 MB	48 MB + 48 MB
2 CCD 3D V-Cache	N/A	64 MB + 64 MB	96 MB + 96 MB
2 CCD Total Cache	64 MB	192 MB	288 MB

Now here's an interesting thing to note: Intel's Nova Lake bLLC variants with single compute tiles will feature up to 144 MB cache, while dual compute tiles will feature up to 288 MB cache. AMD's next-gen 3D V-Cache with boosted capacities will be ideally positioned with the same 144 MB on single CCD and 288 MB on dual CCD models.

So if you round everything up, you can see that AMD has set up a great foundation for its next iteration of Ryzen chips, which will unpack more capabilities with the Zen 6 core architecture. It will be some time before we get to hear some details on next-gen Ryzen, but the wait will be worth it.

It's also great to see the return of the core count battles early next year. Both AMD & Intel will have new families, new platforms, new architectures, higher core counts, and much more for high-end and mainstream desktop builders, and we hope that memory prices also stabilize by that time, making it a perfect time to upgrade your PC.

AMD Olympic Ridge vs Intel Nova Lake-S:

CPUs	Intel Core Ultra 400	AMD Ryzen 10000?
Family	Nova Lake-S	Olympic Ridge
Architecture	Coyote Cove (P-Core) Arctic Wolf (E/LP Core)	Zen 6
CPU Process	TSMC N2P	TSMC N2P
Core Count (Max)	52	24
Thread Count (Max)	52	48
Max P-Cores	16	24
Max E-Cores	32	N/A
Max LP-E Cores	4	N/A
Max Cache (L2+L3)	160-320 MB	96 MB L3
Max 3D/bLLC Cache	144-288 MB	144-288 MB
DDR5 (1DPC 1R)	8000 MT/s CUDIMM - Yes	7200 MT/s? CUDIMM - Yes
PCIe 5.0 Lanes (Max)	36	TBD
PCIe 4.0 Lanes (Max)	16	TBD
Socket Support	LGA 1954	AM5
Max TDP (PL1)	125-175W	125W+
Max Power	~700W (Dual) ~350W (Single)	TBD
Launch	2027	2027

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