JEDEC Moving Towards HBM4 Spec Finalization: Up To 32 Gb Densities In 16-Hi TSV Stacks, 6.4 Gbps Speeds

Muhammad Zuhair
Samsung & SK hynix Eye 1c DRAM As The Choice For HBM4 Memory, TSMC Preps HBM4 Base Dies On 12nm & 5nm 1

JEDEC has unveiled the initial specifications of HBM4 as the highly anticipated memory standard nears completion & ultimately enters mass production.

HBM4 Is Set To Bring In Massive Memory Capacities, Up To 32 Gb Densities In 16-Hi Stacks

The semiconductor and memory industries are all focused on HBM4, the memory type expected to elevate the performance of associated products to new levels. The HBM adoption rate has soared massively in the past year simply due to the demand from the AI markets for products utilizing the memory type, such as AI accelerators. This has not only fueled firms to upscale existing facilities, but it has prompted a new layer of innovation, one which we are witnessing in the form of HBM4. JEDEC has finally verified the development of HBM4, and it has shown us a glimpse of what to expect from it.

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Based on the "preliminary" specifications by JEDEC, HBM4 is expected to feature a "doubled channel count per stack" compared to HBM3, which means a higher utilization area and, ultimately, significantly improved performance.  The standard will feature 24 Gb and 32 Gb layers, coming with 4-high, 8-high, 12-high and 16-high TSV stacks. The initial speed bins agreement is set at 6.4 Gbps, but discussions to cross this barrier are still underway, and we'll likely see improved speeds once the standard debuts in the market. NVIDIA has already announced HBM4 for its next-gen Rubin AI accelerators.

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Apart from that, HBM4 will feature the same controller as HBM3, which means that device compatibility will be much more extensive with the newer standard. Interestingly, JEDEC didn't mention how HBM4 memory and logic semiconductors into a single package, which is one of the most highly anticipated features of the new memory type. HBM4 is often labeled as a "multi-functional" die, and it eliminates the need to use packaging technology, ultimately showing a tremendous uplift in capabilities.

We recently reported on the "triangular alliance", which includes the likes of SK hynix, TSMC, and NVIDIA, which will involve the Taiwan giant for semiconductors and Team Green for the product design. Not only would such a partnership prove to be revolutionary for the markets, but it would also open new doorways for the AI industry, which is showing a massive demand for higher computing power.

News Source: JEDEC

Muhammad Zuhair Photo

About the author: Muhammad Zuhair is a hardware and technology reporter for Wccftech, specializing in the semiconductor industry and the complex interplay between technology, manufacturing, and geopolitics. His coverage focuses on the corporate strategies and technological roadmaps of industry giants like TSMC, NVIDIA, Samsung, and Intel. Zuhair's expertise lies in deconstructing complex topics such as fabrication nodes (e.g., 2nm process), the economic impact of policies like the CHIPS Act, and the strategic development of AI infrastructure from NVIDIA, AMD and Intel.

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