AMD Talks Next Generation Coherent Interconnect Fabric Connecting Polaris GPUs, Zen CPUs and HPC APUs

Hassan Mujtaba
Posted Jan 16, 2016
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AMD has long been known to be developing their own coherent interconnect fabric that will be integrated a wide spectrum of products that are aimed at the server and HPC markets. Talking to PCWatch, AMD’s SVP of Radeon Technologies Group, Raja Koduri, said that their company is developing a new coherent interconnect fabric that will offer both, ultra-wideband and low latency, connecting GPUs, CPUs and APUs developed by AMD.

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Since the creation of RTG (Radeon Technologies Group), Raja Koduri has put a lot of focus back to GPUs. In 2012, AMD’s strategy was quite different to what it is today. The company focused on their APU (accelerated processing units) and SOC (System-on-chip) designs however that didn’t work well for the company. The GPU department on the other hand has been a main driving force behind for them and that’s where both AMD and RTG is specifically eyeing at after the restructuring of the company in September 2015.

According to Raja, there’s a constant rise in compute demand for the high-end PC market. Specifically speaking about compute performance where the GPU clearly shines against modern CPUs, there’s just constant demand for greater computing needs in the high-performance computing sector which consists of HPC, Servers and the Workstation machines. To feed that demand, AMD is coming back with a big bang in the GPU department with their Polaris GPU architecture but their aim doesn’t stop at GPUs alone.

Even with rumors going on around that discrete GPUs won’t stay in the market in the long term, the statement is simply dismissed by Raja who further says that the market for dGPU will always be on the rise as compute demand will never decrease. Raja explains that the market has two kinds of users, those who don’t demand the compute performance are the casual and entry level audience who either buy low-end PCs or smartphones and high-end users who eye better performance and compute. The high-end sector consists of users more than just gamers and like stated, the HPC, Server and Workstation market is also part of this sector who keep on demand for better compute and performance.

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Both AMD and NVIDIA face a similar problem in the high-end sector which is to feed the high compute demand of their customers. According to AMD, not even their Radeon R9 Fury (Fiji based) graphics cards are powerful enough alone to meet those demands but by offering more scalability and stability, allowing multiple GPUs to run in parallel to one another to solve a problem, the necessary performance could be achieved.

In a perfect situation, all GPUs inside a workstation can be made to act as a single resource that aims to solve a specific set of problems. Currently, AMD only provides a software based multi-GPU framework added in their recent Boltzmann Initiative but moving forward, AMD knows that an update to their multi-GPU solution, also known as CrossFire, is needed to provide a hardware based multi-GPU solution that aims to deliver a robust scaling across AMD’s GPUs. For this matter, they are developing their own open Interconnect fabric that will not only allow AMD GPUs to run in tandem with one another but also allow third-party solutions (GPUs, FPGAs).

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PCI-Express is already seen as a bottleneck when connecting several nodes in high-performance sectors. AMD sees their current PCI-e and CrossFire solutions not working with next generation machines hence they have to design a new coherent fabric. The interconnect will offer speeds of 100 GB/s across multiple GPUs and APUs that are featured inside AMD powered compute machines and will deploy some open standards. Asking if the interconnect will also maintain memory coherency and sharing between the GPUs and CPUs, Raja stated that he can’t reveal that right now but will definitely have a detailed showcase of their coherent fabric later on as coherency between their several chip designs is being kept in mind.

Comparing to NVIDIA’s NVLINK which is going to have interconnect speeds of up to 200 GB/s, the AMD solution does have a slight advantage as it works across x86 processors as well while NVIDIA’s NVLINK works across the NVIDIA based GPUs and IBM’s Power CPUs. NVIDIA is already deploying NVLINK in two next generation super computer so it will be interesting to see AMD’s own solution going in action to power some high-end spectrum devices.

AMD’s Latest Packaging and Integration To Help Development of HPC APUs

The letter “P” is very dear to Raja as it means four key components for RTG while designing next gen GPUs. The four “Ps” include Performance, Power, Price and last but not least Packaging. AMD is the firs graphics vendor to ship an HBM powered graphics card and they have got some experience from it in the packaging department. Tight integration of the GPU and HBM silicon on the same substrate (interposer) leads to some crucial learning that helps designing next generation solutions for compute hungry audiences.

For some time, we have been hearing about HPC APUs which are simply put, high-end APUs that will come with a fast discrete graphics chip, several next-gen x86 cores and tons of HBM memory, all integrated on a package and all chips linked via the fast interconnect which has been talked about in this article. We have previously reported on extensive details regarding the High-Performance Computing APU and Exascale Heterogeneous Processors from AMD. If all goes well, we will see an update in this regards when the Zen processors hit the market which is probably due for release at the end of this year.

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