MSI Gaming X 1080 Review – Is Single GPU 4K Really Here?

Jul 10, 2016
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Reminder of the 1080, GP104 says hello

Historically speaking both graphics vendors Nvidia and AMD have successfully maintained a cadence that ensured significant performance and power efficiency advances are delivered with every new architecture and Pascal is no exception. The very basic building block of Nvidia’s Pascal architecture has been stripped apart and redesigned. This building block which Nvidia dubs Streaming Multiprocessor or SM for short is the engine that drives the graphics and compute horsepower of every Pascal chip.

With Maxwell, Pascal’s predecessor powering the GTX 900 series, Nvidia introduced the Streaming Maxwell Multiprocessor. The SMM built on the strengths of Nvidia’s Kepler SM – introduced with the GTX 600 and 700 series – which Nvidia dubs the SMX. It also done away with many unnecessary complexities which enabled the engine to deliver more throughput and higher clock speeds. The Pascal SM in its own right is an evolution of the Maxwell SM, a smarter, more streamlined engine.

GP104

Inside Nvidia’s full GP104 powering the GTX 1080 (a cut back version of the GP104 GPU is used in the GTX 1070) – there are four Graphics Processing Clusters or GPCs. Each GPC consists of five Streaming Multiprocessors or SMs – each SM contains 128 CUDA cores – and sixteen Texture Mapping Units or TMUs. Each SM includes eight Render Output Units, ROPs. In turn GP104 houses 2560 CUDA cores, 160 TMUs and 64 ROPs. Finally the engine is connected via eight 32-bit memory segments – 256bit memory controller – to 8GB of GDDR5X memory.

As mentioned, each GP104 streaming multiprocessor includes 128 FP32 CUDA cores, the same as Maxwell. Within each GP104 streaming multiprocessor there are four 32 CUDA core partitions, four dispatch units, two warp schedulers and a fairly large instruction buffer. Twice as large compared to Maxwell.

This arrangement is almost identical to what we’ve seen with the much larger 3840 CUDA core GP100 GPU that’s powering the Tesla P100. Only inside GP100 each SM contains exactly half the number of CUDA cores, dispatch units and warp schedulers vs GP104. But in turn there are twice as many SMs per GPC.

So the only difference with GP104 is that Nvidia is grouping 64 CUDA core SMs in pairs made of 128 CUDA cores each and in turn naming the larger 128 unit an SM instead. This is all while maintaining the exact same ratio of dispatch units, warp schedulers and instruction buffers per CUDA core that we’ve seen with GP100.

So think of it as Nvidia just pairing 64 CUDA core groups together in a single SM. This decision is likely influenced by the significant reduction of FP64, double precision, CUDA cores per SM inside GP104 vs GP100. GP104 only contains 1 FP64 CUDA core for every 32 FP32 CUDA cores. While GP100 has 1 FP64 CUDA core for every 2 FP32 CUDA cores, 16 times more than GP104.

Additionally because each GP104 SM has twice the number of registers as Maxwell, this in turn means that not only can Pascal accommodate more threads than Maxwell, but each thread has access to more registers and thus a lot more throughput. Finally, each warp scheduler can dispatch two instructions per clock.

Nvidia’s Senior Architect, Lars Nyland admitted that the 16nm FinFET process played an important role in realizing the team’s power efficiency goals for Pascal, but maintains that numerous architectural improvements aided in further reducing the energy footprint of the architecture. Including the use of new on-chip voltage signalling technologies.

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