Intel has teased its next-generation Meteor Lake CPUs during the IDM 2.0 Accelerated keynote where the company presented its brand new process and packaging roadmap. In addition to the teaser, Intel also hinted at a possible launch date of its upcoming Alder Lake hybrid CPUs during early Q4 2021.
Intel Teases Meteor Lake 'Intel 7' CPU Specifications, Alder Lake CPUs Hinted For Launch on 27th October
Intel not only presented its brand new process and packaging roadmap but also teased products that will be utilizing its new nodes, mainly Intel 7 and Intel 4. First up, we have Alder Lake Client & Sapphire Rapids Data Center chips which will be based upon the Intel 7 node (previously Intel 10 Enhanced SuperFin).
Intel 7 Process Powered Alder Lake Client & Sapphire Rapids Data Center CPUs
Based on what Intel showed during the event, it looks like we can confirm that the leaks we have seen so far are more or less confirmed. The Alder Lake CPU can be seen using a hybrid design & features 8 high-performance cores (Golden Cove) and 8 efficiency optimized cores (Gracemont). Intel also kind of hinted at the launch date of its 12th Gen Alder Lake family for 27th October and that aligns with earlier rumors that we heard about the CPUs launching around Halloween 2021. The next Intel ON series event will take place virtually in San Francisco on October 27-28, 2021.
Moving on, we have Intel's Sapphire Rapids-SP Xeon CPU which is composed of four compute tiles. We have more detailed images of the complete die leak out before which confirm up to 56 cores & 112 threads.
Intel 4 Process Powered Meteor Lake Client & Granite Rapids Data Center CPUs
Intel 4 will also power two key client and data center products which are codenamed Meteor Lake & Granite Rapids. This is the first time Intel has given a detailed look at the Meteor Lake SOC that features three separate chiplets that are connected together through Forveros technology. Intel is expected to utilize a next-generation core architecture that will power the compute die while the I/O will be located on its own SOC-LP die. The GPU die will also be separate and will be composed of up to 192 EU (96 EU for Desktops & 192 EUs for Mobility). The Meteor Lake lineup will comprise 5-125W CPUs and feature a bump pitch of 36u (microns).
Here's Everything We Know About The 14th Gen Meteor Lake 7nm CPUs
We already got some details from Intel such as the fact that Intel's Meteor Lake line of desktop and mobility CPUs are expected to be based on a new line of Cove core architecture. This is rumored to be known as the 'Redwood Cove' and will be based on a 7nm EUV process node. It is stated that the Redwood Cove is designed from the ground up to be an agnostic node which means that it can be fabricated at different fabs. There are references mentioned that point out to TSMC to be a backup or even a partial supplier for the Redwood Cove-based chips. This might tell us why Intel is stating multiple manufacturing processes for the CPU family.
The Meteor Lake CPUs may possibly be the first CPU generation from Intel to say farewell to the ring bus interconnect architecture. There are also rumors that Meteor Lake could be a fully 3D-Stacked design and could utilize an I/O die sourced from an external fab (TSMC sighted again). It is highlighted that Intel will be officially utilizing its Foveros Packaging Technology on the CPU to inter-connect the various dies on the chip (XPU). This also aligns with Intel referring to each tile on 14th Gen chips individually (Compute Tile = CPU Cores).
The Meteor Lake Desktop CPU family is expected to retain support on the LGA 1700 socket which is the same socket used by Alder Lake & Raptor Lake processors. We can expect DDR5 memory and PCIe Gen 5.0 support. The platform will support both DDR5 & DDR4 memory with the mainstream and budget tier options going for DDR4 memory DIMMs while the premium & high-end offerings going for DDR5 DIMMs. The site also lists down both Meteor Lake P and Meteor Lake M CPUs that will be aimed at mobility platforms.
Intel Mainstream CPU Generations Comparison:
|Intel CPU Family||Processor Process||Processor Architecture||Processors Cores/Threads (Max)||TDPs||Platform Chipset||Platform||Memory Support||PCIe Support||Launch|
|Sandy Bridge (2nd Gen)||32nm||Sandy Bridge||4/8||35-95W||6-Series||LGA 1155||DDR3||PCIe Gen 2.0||2011|
|Ivy Bridge (3rd Gen)||22nm||Ivy Bridge||4/8||35-77W||7-Series||LGA 1155||DDR3||PCIe Gen 3.0||2012|
|Haswell (4th Gen)||22nm||Haswell||4/8||35-84W||8-Series||LGA 1150||DDR3||PCIe Gen 3.0||2013-2014|
|Broadwell (5th Gen)||14nm||Broadwell||4/8||65-65W||9-Series||LGA 1150||DDR3||PCIe Gen 3.0||2015|
|Skylake (6th Gen)||14nm||Skylake||4/8||35-91W||100-Series||LGA 1151||DDR4||PCIe Gen 3.0||2015|
|Kaby Lake (7th Gen)||14nm||Skylake||4/8||35-91W||200-Series||LGA 1151||DDR4||PCIe Gen 3.0||2017|
|Coffee Lake (8th Gen)||14nm||Skylake||6/12||35-95W||300-Series||LGA 1151||DDR4||PCIe Gen 3.0||2017|
|Coffee Lake (9th Gen)||14nm||Skylake||8/16||35-95W||300-Series||LGA 1151||DDR4||PCIe Gen 3.0||2018|
|Comet Lake (10th Gen)||14nm||Skylake||10/20||35-125W||400-Series||LGA 1200||DDR4||PCIe Gen 3.0||2020|
|Rocket Lake (11th Gen)||14nm||Cypress Cove||8/16||35-125W||500-Series||LGA 1200||DDR4||PCIe Gen 4.0||2021|
|Alder Lake (12th Gen)||Intel 7||Golden Cove (P-Core)|
|16/24||35-125W||600 Series||LGA 1700/1800||DDR5 / DDR4||PCIe Gen 5.0||2021|
|Raptor Lake (13th Gen)||Intel 7||Raptor Cove (P-Core)|
|24/32||35-125W||700-Series||LGA 1700/1800||DDR5 / DDR4||PCIe Gen 5.0||2022|
|Meteor Lake (14th Gen)||Intel 4||Redwood Cove (P-Core)|
|22/28||35-125W||800 Series?||LGA 1851||DDR5||PCIe Gen 5.0||2023|
|Arrow Lake (15th Gen)||Intel 20A||Lion Cove (P-Core)|
|24/32||TBA||900-Series?||LGA 1851||DDR5||PCIe Gen 5.0||2024|
|Lunar Lake (16th Gen)||Intel 18A||TBD||TBA||TBA||1000-Series?||TBA||DDR5||PCIe Gen 5.0?||2025|
|Nova Lake (17th Gen)||Intel 18A||TBD||TBA||TBA||2000-Series?||TBA||DDR5?||PCIe Gen 6.0?||2026|
Intel has also showcased its next-generation Granite Rapids datacenter Xeon CPU which seems to be featuring several dies packaged through Forveros and EMIB. We can see HBM packages along with high-bandwidth Rambo Cache packages. The Compute tile seems to be composed of 60 cores per die which equals 120 cores in total but we should expect a few of those cores to be disabled to get better yields on the new Intel 4 process node.
Intel Xeon SP Families (Preliminary):
|Family Branding||Skylake-SP||Cascade Lake-SP/AP||Cooper Lake-SP||Ice Lake-SP||Sapphire Rapids||Emerald Rapids||Granite Rapids||Diamond Rapids|
|Process Node||14nm+||14nm++||14nm++||10nm+||Intel 7||Intel 7||Intel 3||Intel 3?|
|Platform Name||Intel Purley||Intel Purley||Intel Cedar Island||Intel Whitley||Intel Eagle Stream||Intel Eagle Stream||Intel Mountain Stream|
Intel Birch Stream
|Intel Mountain Stream
Intel Birch Stream
|Core Architecture||Skylake||Cascade Lake||Cascade Lake||Sunny Cove||Golden Cove||Raptor Cove||Redwood Cove?||Lion Cove?|
|IPC Improvement (Vs Prev Gen)||10%||0%||0%||20%||19%||8%?||35%?||39%?|
|MCP (Multi-Chip Package) SKUs||No||Yes||No||No||Yes||Yes||TBD (Possibly Yes)||TBD (Possibly Yes)|
|Socket||LGA 3647||LGA 3647||LGA 4189||LGA 4189||LGA 4677||LGA 4677||TBD||TBD|
|Max Core Count||Up To 28||Up To 28||Up To 28||Up To 40||Up To 56||Up To 64?||Up To 120?||Up To 144?|
|Max Thread Count||Up To 56||Up To 56||Up To 56||Up To 80||Up To 112||Up To 128?||Up To 240?||Up To 288?|
|Max L3 Cache||38.5 MB L3||38.5 MB L3||38.5 MB L3||60 MB L3||105 MB L3||120 MB L3?||240 MB L3?||288 MB L3?|
|Memory Support||DDR4-2666 6-Channel||DDR4-2933 6-Channel||Up To 6-Channel DDR4-3200||Up To 8-Channel DDR4-3200||Up To 8-Channel DDR5-4800||Up To 8-Channel DDR5-5600?||Up To 12-Channel DDR5-6400?||Up To 12-Channel DDR6-7200?|
|PCIe Gen Support||PCIe 3.0 (48 Lanes)||PCIe 3.0 (48 Lanes)||PCIe 3.0 (48 Lanes)||PCIe 4.0 (64 Lanes)||PCIe 5.0 (80 lanes)||PCIe 5.0 (80 Lanes)||PCIe 6.0 (128 Lanes)?||PCIe 6.0 (128 Lanes)?|
|TDP Range (PL1)||140W-205W||165W-205W||150W-250W||105-270W||Up To 350W||Up To 375W?||Up To 400W?||Up To 425W?|
|3D Xpoint Optane DIMM||N/A||Apache Pass||Barlow Pass||Barlow Pass||Crow Pass||Crow Pass?||Donahue Pass?||Donahue Pass?|
|Competition||AMD EPYC Naples 14nm||AMD EPYC Rome 7nm||AMD EPYC Rome 7nm||AMD EPYC Milan 7nm+||AMD EPYC Genoa ~5nm||AMD EPYC Bergamo||AMD EPYC Turin||AMD EPYC Venice|