TSMC’s 7nm Risk Production Will Start In April; 7nm+ Will Use EUV, With 1.2x Logic Density & 10% Performance Boost Over 7nm
The talk of 2017 is 10nm. The advanced manufacturing technology will make its way to processors for flagship smartphones and will outperform its predecessor. The main focus for 10nm will be power efficiency, rather than performance. In fact, Qualcomm hopes that 80% of the Snapdragon 835’s load will go through the low power performance cores. 7nm however, will mark a true jump in performance. TSMC recently talked about its advances with the processor. Take a look below to find out more.
TSMC Will Use EUV On Advanced Versions Of 7nm – First Generation Risk Production Will Commence Next Month
After Samsung, now Taiwanese fab TSMC has shared a lot of details for progress on 7nm. The highly risky nature of the tech industry allows no room to slow down. Even as one product is going out, the next is under significant R&D. It’s 7nm’s turn for the spotlight today. TSMC claims a lot of improvements made on its plans for the process. The manufacturer reports 76% yields on 256Mbit SRAM modules manufactured on 7nm. The manufacturer also claims that an ARM Cortex A72 processor in the node exceeded 4GHz in frequency.
Following this progress, TSMC will commence risk production for first generation 7nm process next month. The fab will generate a total of 20 tapeouts for this year. The Cortex A72 processor which exceeded 4GHz, utilized the company’s 7nm HPC platform. This is an upgraded form of 7nm and features high performance transistors that guarantee a 5% speed gain over basic 7nm. 7nm in general will deliver 3.3x increased router gate density and a trade-off between 60% less power or 35% processing speed.
10nm & Outlook:
“Bulk semiconductor technology has been enhanced for 30 years and is used by Intel and Samsung,” the world’s two largest chip makers. FD-SOI will always be the technology of the future said Mark Liu, TSMC’s co-chief executive. The fab will also release an ultra-low power variant of its 12nm FinFET. This will carry consumption of 0.5V and will enter risk production by June. TSMC’s got a lot of ambitious plans and a lot of variants of its processes.
The company is also bracing fully to support Apple’s requirements for 10nm. An executive believes that 10nm wafer volume will exceed 16nm this year, with a total of 400,000 wafers expected in the same time period. According to TSMC, the 10nm wafer will have a trade off between 10% increased speed or 25% improvement in power consumption. Finally, the company also expect 5nm volume production to commence in 2020. 5nm will be the next big jump after 7nm, as processors continue to shrink nodes.
7nm+ With EUV:
The big announcement is TSMC’s decision to use EUV for advanced 7nm variants. The company achieved 125W using its EUV system on 7nm. With this, the fab hopes to achieve 250W on 7nm+, in 2019. 7nm+ with EUV will enter mass production by 2019. The major focus for next year will be 7nm, with manufacturers like Apple waiting in line for the annual technology upgrade cycle. 7nm+ will feature 1.2x times logic density and a trade-off between 10% speed increase or 15% power efficiency over its predecessor, 7nm.
“We believe we will be the first one to use EUV in volume production.” according to an executive. Risk production will start by June 2018. With this, the company hopes to beat Samsung. The Korean tech giant promises EUV for fabrication by 2019. Finally, TSMC also elaborated on its unique InFO (Integrated FanOut) design. The company is developing multiple versions for InFO, including support for HPC with 65mm2 substrates. Finally, the company hopes to separate its processes on a functional basis, covering automobiles, smartphones, IoT and others separately.
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