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Intel Is Reportedly Working On A Brand New Implementation of The x86 Architecture: One That Is Much Faster and Leaner

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Dec 26, 2016
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The grapevine has been buzzing with something that is pretty huge as far as developments in this industry go. According to Bitsandchips.it, Intel has started working on a brand new x86 architecture that will succeed the current ‘Core’ generation that has been in force since Sandy Bridge. If true, this would be a pretty huge move since an update is long overdue, and according to the source would happen sometime in the 2019-2020 time frame. Unlike before however, there will be a slight twist this time around.

The Intel ‘Core’ legacy will come to an end with Tiger Lake in 2019 – To be succeeded by a lean and mean approach to x86

So when they say new architecture, what exactly does that mean. We talk about architectures a lot as far as GPUs go but the fact of the matter is that the architecture of a CPU works in a slightly different way. Where GPUs have historically freely shifted architectures on a very significant scale, Intel really hasn’t shifted from its primary one in ages. As the inventor of the x86 architecture, it has a cross-licensing agreement with AMD to utilize the x86_64 extension of the same architecture (which is basically the 64-bit implementation of x86). It’s a funny state of affairs since Intel cannot offer 64-bit compatibility without licensing x86_64 from AMD and the latter cannot ship 64-bit processors unless it has licensed the base x86 from Intel.

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All this time, and through the generations, however, Intel processors have remained 100% backward compatible with all previous iterations. The same basic architecture expanded over and over with new features with time. Every new Intel architecture that we talk about on here (or every tock of Intel’s PAO cadence) is essentially the same underlying x86 architecture expanded with new features with every iteration. For the first time, however, and if this rumor turns out to be true, things might actually change. Intel might introduce an x86 architecture that we can consider to be truly different from what we have seen so far. The reason? It will be a lean mean, x86-on a diet where backward compatibility is no longer assured. Intel’s PAO cadence) is essentially the same underlying x86 architecture expanded with new features with every iteration.

The reason for doing so is simple, by no longer guaranteeing backward compatibility, Intel could save precious die space by removing the hardware for legacy SIMDs and other legacy features. The result would be a much leaner and more efficient x86 architecture that can deliver a bigger bang for lower resources on-die. According to the source, the architecture will be used to replace the current Core series on the Desktop and Enterprise market. It is possible that Intel shifts the 100% backward compatible x86 towards the server side where legacy operations might actually be required on a continuous basis.

If this news turns out to be true than Tiger Lake would be the last iteration of the current x86 architecture from Intel Corporation. This is expected to arrive sometime in 2019 so we can expect the brand new x86 implementation to land by 2020 approximately. One of the reasons we believe that this rumor is actually true is because Intel has already taken steps in this direction with the advent of Skylake, which can be thought of as the first significant change since the Sandy Bridge era. The focus on mobile and energy efficiency is clearly obvious and the removal of gimmicks such as the Fully Integrated Voltage Regulator (FIVR) (remember that?) shows a much more mature outlook on on-package economics.

So just how much will this be a problem for customers of any segment? The answer might seem surprising but it should not affect all but the rare few by a lot even if you are someone who uses legacy SIMDs. See the thing is, any Streaming SIMD Extension (SSE) can be emulated by a higher order SSE. And since Intel is working on removing legacy SIMDs, these can be easily emulated if they are ever called by the OS when needed. The upside is, however, that you will be freeing up space on the die for smaller and more efficient cores and consequently a much more streamlined x86 architecture.

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