TSMC Unveils World’s Largest CoWoS Interposer – 1700mm2, Up To 6 HBM Stacks For 96 GB VRAM, Massive Bandwidth And I/O Capabilities
TSMC today announced it has collaborated with Broadcom on enhancing the Chip-on-Wafer-on-Substrate (CoWoS) platform to support the industry’s first and largest 2x reticle size interposer. With an area of approximately 1,700mm2, this next generation CoWoS interposer technology significantly boosts computing power for advanced HPC systems by supporting more SoCs as well as being ready to support TSMC’s next-generation five-nanometer (N5) process technology.
The New TSMC CoWoS Platform Comes in a 2x reticle size interposer - Is Almost 3 Times Faster Than The Previous Generation, 1700mm2
This new generation CoWoS technology can accommodate multiple logic system-on-chip (SoC) dies, and up to 6 cubes of high-bandwidth memory (HBM), offering as much as 96GB of memory. It also provides a bandwidth of up to 2.7 terabytes per second, 2.7 times faster than TSMC’s previously offered CoWoS solution in 2016. With higher memory capacity and bandwidth, this CoWoS solution is well-suited for memory-intensive workloads such as deep learning, as well as workloads for 5G networking, power-efficient data centers and more.
In addition to offering additional areas to increase compute, I/O, and HBM integration, this enhanced CoWoS technology provides greater design flexibility and yield for complex ASIC designs in advanced process nodes.
In this TSMC and Broadcom CoWoS platform collaboration, Broadcom defined the complex top-die, interposer, and HBM configuration while TSMC developed the robust manufacturing process to maximize yield and performance and meet the unique challenges of the 2X reticle size interposer. Through the experience of multiple generations of development of the CoWoS platform, TSMC innovated and developed a unique mask-stitching process enabling expansion beyond full reticle size, to bring this enhancement to volume production.
CoWoS is part of TSMC’s portfolio of Wafer-Level System Integration (WLSI) solutions enabling system-level scaling both complementary to and beyond shrinking transistors. In addition to CoWoS, TSMC’s innovative 3DIC technology platforms, such as Integrated Fan-Out (InFO) and System on Integrated Chips (SoIC) enable innovation through chiplet partitioning and systems integration that achieves greater functionality and enhanced system performance.
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