Google is working with MediaTek to bring its next-generation TPUv9 chip, codenamed Triggerfish, to the Agentic AI market.
MediaTek-Developed Google TPUv9 "Triggerfish" Packs A CPU That Should Accelerate Both AI Training & Inference Workloads
A few months back, Google unveiled its latest TPU family, which included the Inference-optimized v8i "Zebrafish" developed by MediaTek, and the training-optimized v8t "Sunfish" developed by Broadcom.
For its next-generation TPU, Google aims to deploy both Inference and Training capabilities on a single chip. The chip is internally codenamed "Triggerfish" and will be part of the upgraded TPUv9 series.
Based on the latest report by FundaAI, it looks like MediaTek will once again be developing the chip for Google. The TPUv9 series is expected to see mass production commencing in Q3 2027, with Humufish being the first, followed by Triggerfish in Q4 2027. Both of these chips will achieve volume ramp in 2028.
TPUv9 - Tackling Inference & Training On A Single Chip
Some of the major highlights of TPUv9 "Triggerfish" include a larger SRAM and a new CPU tile that MediaTek has added to handle AI workload switching between training and inference. This brand new CPU tile will be featured on the same package as the main compute die, & it is expected that the total TPU shipments for 2027 should be around 10-11 million.
Google's strategy with its TPUs has evolved substantially in the past few years. Since the company delved into the custom-silicon business, it has rapidly expanded its chip lineup with workload-specific accelerators. That's why we saw a split into training and inference markets with its recent TPUv8 series. With the next generation, Google is trying to make a one-stop solution that handles both Inference and Training workflows while offering a bigger SRAM cache (2-3 times higher) that tackles Agentic AI.
The Intel EMIB Equation
Google is also expected to introduce a brand new optimized lineup within the TPUv9 stack, with the likes of "Humufish" expected to utilize Intel's EMIB packaging. Compared to CoWoS (2.5D), EMIB is said to be far more versatile, offering low-cost and scalable designs. TPUv9 "Humufish" (formerly v8e) is expected to have its main compute die made by Google itself, while the I/O and back-end design will be made by MediaTek.
The v9 Triggerfish chip will utilize HBM4E memory, while v9 Humifish will reportedly use HBM4 DRAM.
Although reports claimed that Google's upcoming TPU chips could be manufactured at Intel, citing up to 3 million units, research analysts stated that the chips will still be manufactured at TSMC, but Intel will be responsible for the packaging. There could be a possibility that Google might move some capacity to Intel Foundry due to ongoing supply-chain bottlenecks and TSMC being overwhelmed with existing orders for chips from NVIDIA, AMD, and Apple.
Google is set to transform the AI hardware landscape with its TPUv9 "Triggerfish," developed in partnership with MediaTek. By integrating both training and inference capabilities onto a single chip, featuring significantly larger SRAM and a dedicated CPU tile for seamless workload switching, Triggerfish should deliver a versatile, high-performance solution tailored for the demands of Agentic AI.
About the author: A Software Engineer by training and a PC enthusiast by passion, Hassan Mujtaba serves as Wccftech's Senior Editor for hardware section. With years of experience in the industry, he specializes in deep-dive technical analysis of next-generation CPU and GPU architectures, motherboards, and cooling solutions. His work involves not only breaking news on upcoming technologies but also extensive hands-on reviews and benchmarking.
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