Intel’s 10nm Ice Lake Xeon With 38 Cores / 76 Threads at 270W, 14nm Cooper Lake Xeon With 48 Cores / 96 Threads at 300W Arriving in 2020
Intel's next-generation Xeon lineup which includes 10nm Ice Lake and 14nm Cooper Lake has been further detailed in a slide. The new Xeon lineup which is supposed to launch in 2020 would be featuring a series of new technologies along with an increase in the total number of cores and PCIe lanes compared to existing Xeon families.
Intel 10nm Ice Lake Xeon With Up To 38 Cores & 270W TDP, 14nm Cooper Lake With Up To 48 Cores & 300W TDP Arriving in 2020
Aimed at the Whitley platform, the Intel 10nm Ice Lake and 14nm Cooper Lake would be launching in 2020. The 14nm Cooper Lake Xeons would launch early in Q2 2020 followed by the 10nm Xeon lineup in Q3 2020. Both families would coexist and we could see the Cooper Lake family be more tuned in terms of clock speeds compared to Ice Lake Xeons due to extensive maturation of the 14 nm process node.
The new details for both, the Ice Lake Xeon family and the Cooper Lake Xeon family are mentioned below:
Intel Xeon 10nm+ Ice Lake-SP/AP Family
Intel Ice Lake-SP processors will be available in the third quarter of 2020 and will be based on the 10nm+ process node. We have seen earlier slides say that the Ice Lake family would feature up to 28 cores but the one from ASUS's presentation says that it would actually feature up to 38 cores & 76 threads per socket.
The main highlight of Ice Lake-SP processors will be support for PCIe Gen 4 and 8-channel DDR4 memory. The Ice Lake Xeon family would offer up to 64 PCIe Gen 4 lanes and would offer support for 8-channel DDR4 memory clocked at 3200 MHz (16 DIMM per socket with 2nd Gen Persistent memory support). Intel Ice Lake Xeon processors would be based on the brand new Sunny Cove core architecture which delivers an 18% IPC improvement versus the Skylake core architecture that has been around since 2015.
One thing to note is that Intel's 10nm for 2020 is an enhanced node of the original 10nm node that will launch this year. It's marked as 10nm+ and that is specifically what the Ice Lake-SP Xeon line will make use of. Some of the major upgrades that 10nm will deliver include:
- 2.7x density scaling vs 14nm
- Self-aligned Quad-Patterning
- Contact Over Active Gate
- Cobalt Interconnect (M0, M1)
- 1st Gen Foveros 3D Stacking
- 2nd Gen EMIB
Intel Xeon 14nm+++ Cooper Lake-SP/AP Family
Moving on to the Cooper Lake Xeon family which is based on the 14nm+++ process node, we are looking at up to 48 cores and 96 threads in a socketed design. The current Cascade Lake-SP family offers up to 28 cores in socketed variants while the Cascade Lake-AP SKUs which come in BGA only, offer up to 56 cores and 112 threads with TDPs as high as 400W.
There will also be a 56 core and 112 thread socketed variant in the Cooper Lake family but that is likely to be part of the Xeon-AP line of chips which feature two dies on the same interposer. In a similar fashion, the BGA and LGA parts in the Ice Lake-AP family could also feature more cores than the SP part but they will be dual-die design and not a single monolithic chip like the ones mentioned here. Also, the 38 core configuration for Ice Lake Xeon doesn't make sense since that means there have to be two 19 core dies and the 19 core config itself isn't something that Intel has done before.
In addition to the higher core count, Intel's Cooper Lake line of Xeon Scalable processors is said to offer higher memory bandwidth, higher AI inference & training performance while supporting blfloat16 through Intel's DL Boost framework. The Whitley platform which will be based around the LGA 4189 socket will also feature support for Intel's Ice Lake-SP processors that utilize the 10nm process node. Ice Lake-SP will also launch in 2020, just slightly after the introduction of Cooper Lake-SP. The Whitley platform would offer support for 8 channel DDR4 memory, 64 PCIe Gen 3.0 lanes.
Intel Xeon SP Families:
|Family Branding||Skylake-SP||Cascade Lake-SP/AP||Cooper Lake-SP||Ice Lake-SP||Sapphire Rapids||Emerald Rapids||Granite Rapids||Diamond Rapids|
|Process Node||14nm+||14nm++||14nm++||10nm+||10nm Enhanced SuperFin?||10nm Enhanced SuperFin?||7nm?||sub-7nm?|
|Platform Name||Intel Purley||Intel Purley||Intel Cedar Island||Intel Whitley||Intel Eagle Stream||Intel Eagle Stream||Intel Mountain Stream|
Intel Birch Stream
|Intel Mountain Stream
Intel Birch Stream
|MCP (Multi-Chip Package) SKUs||No||Yes||No||No||Yes||TBD||TBD (Possibly Yes)||TBD (Possibly Yes)|
|Socket||LGA 3647||LGA 3647||LGA 4189||LGA 4189||LGA 4677||LGA 4677||LGA 4677||TBD|
|Max Core Count||Up To 28||Up To 28||Up To 28||Up To 40||Up To 56?||TBD||TBD||TBD|
|Max Thread Count||Up To 56||Up To 56||Up To 56||Up To 80||Up To 112?||TBD||TBD||TBD|
|Max L3 Cache||38.5 MB L3||38.5 MB L3||38.5 MB L3||60 MB L3||TBD||TBD||TBD||TBD|
|Memory Support||DDR4-2666 6-Channel||DDR4-2933 6-Channel||Up To 6-Channel DDR4-3200||Up To 8-Channel DDR4-3200||Up To 8-Channel DDR5-4800||Up To 8-Channel DDR5-5200?||TBD||TBD|
|PCIe Gen Support||PCIe 3.0 (48 Lanes)||PCIe 3.0 (48 Lanes)||PCIe 3.0 (48 Lanes)||PCIe 4.0 (64 Lanes)||PCIe 5.0 (80 lanes)||PCIe 5.0||PCIe 6.0?||PCIe 6.0?|
|TDP Range||140W-205W||165W-205W||150W-250W||105-270W||Up To 350W?||TBD||TBD||TBD|
|3D Xpoint Optane DIMM||N/A||Apache Pass||Barlow Pass||Barlow Pass||Crow Pass||Crow Pass?||Donahue Pass?||Donahue Pass?|
|Competition||AMD EPYC Naples 14nm||AMD EPYC Rome 7nm||AMD EPYC Rome 7nm||AMD EPYC Milan 7nm+||AMD EPYC Genoa ~5nm||AMD Next-Gen EPYC (Post Genoa)||AMD Next-Gen EPYC (Post Genoa)||AMD Next-Gen EPYC (Post Genoa)|
Intel's Sapphire Rapids-SP and Granite Rapids-SP Xeon families for the Eagle Stream platform were also recently detailed and would bring on the post 10nm era for Intel's Xeon segment, offering new capabilities such as PCIe 5.0 and DDR5 memory along with the new Golden and Willow Cove cores that are expected to further leverage Intel's IPC lead in the server market. You can read more here.
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