Imagination Technologies Talks About Its RISC-V Undergraduate Course

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The near-ubiquity of a flavor of reduced instruction set computer (RISC) principles designed and patented by British design house Arm Ltd. in the low-power computing applications such as smartphones and the Internet of Things (IoT) has resulted in the company's dominance in the industry. Arm, through its licensing models, provides designers with go-to solutions for their hardware and charges licensing fees - fees which often hamper academic and other uses of the products.

To counter these drawbacks and provide easy use to computing design principles, the RISC-V Foundation has its own instruction set architecture that is free for use for design and academic purposes. In order to promote academic use of RISC-V and facilitate educators in their teaching, another British design house Imagination Technologies Group plc known for its graphics processing units (GPUs), radio equipment and other products, announced at the start of this month that it will include a full undergraduate teaching course on RISC-V in its Imagination University Programme (IUP). Imagination's IUP features courses in mobile graphics and artificial intelligence and its latest course on RISC-V is dubbed "RVfpga: Understanding Computer Architecture”.

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To gain a better understanding of what the company hopes to achieve through this course and the thought process that went behind in designing in, Wccftech had a chance to interview Robert Owen, director of Imagination's Worldwide University Programs. Mr. Owen has decades of teaching and industry experience, and through the RISC-V, he hopes to not only diversify the outcomes for computer science students but also broaden his company's profile among tomorrow's developers and designers.

Robert Owen of Imagination Technologies. Image: IUP

Wccftech: Before we get into the details of the program, I noticed that the program objectives include inculcating an understanding of what is termed as a RISC-V 'Engine'. Could you elaborate more on what this term consists of?

The RISC-V Engine is a huge bubbling part of activity with the likes of Western Digital, Si Five and it's big news for academia as well. Most materials assume you already know about processors. What RISCV enables is for people to pick a processor, and design the SoCs (System-on-Chips) without the need for licenses. If you look at from the undergraduate view, they don’t know what a processor is, how different parts such as memories, registers off-chip memories, on-chip cache memories, timers and counters are linked to make a processor. Linking these components is called the engine. Once students have learned about the engine, they can move forward. This is the major gap we identified in the RISCV system, the gap between what is taught and what the industry knows.

W: What are your primary objectives with the courses?

In addition to academic reasons, we also have a commercial reason for the courses. Students who do the course will become more aware of Imagination Technologies. We are well known in our industry and the project will raise our profile and that of our partners. It will bring us, future customers, in some cases. We use RISCV is some of our designs, A-Series GPU uses a RISC-V controller. We have a vested interest internally in developing the level of knowledge in the industry.

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We also want undergraduates to learn something useful and develop an affinity for Imagination. Once the chasm has been crossed, this will make them well-rounded programmers and engineers, and since they will be fascinated by the process, maybe they'll even do a Ph.D. and make their own system on a chip.

W: Given the proliferation of Arm-devices, especially as we head into the 5G era, do you think teaching RISC-V to students will enable them to utilize the upcoming technological changes?

Clearly, Arm is in a very commanding position with the entire 5G market. That’s good for their business. It hasn’t necessarily been best for education because Arm has been very protective of the details of its architecture, it’s also been very reluctant to share its IP with academia in the way we did with MIPS. And still, they’re not on the same level as RISC-V is. You’re not allowed an unrestricted view inside through ARM in the internals to look at details such as how the instruction sets are implemented.

The core used in RVfpga is a Western Digital core that is fully verified and is ready for production after having gone through extra testing you put such components through. Imagination is also using it internally. It is a credible commercial core. Students will work with something that is every bit as credible as Arm. The SweRV core is one of the most developed cores out there. Through this, students will learn through a real product.

Excerpt from a presentation given by Sarah Harris, Associate Professor at the University of Nevada, Las Vegas and Daniel Chaver, Associate Professor at University Complutense of Madrid at the RISC-V Global Forum earlier this month.

W: When designing the course, what key considerations did you take into account?

When designing the course, we kept in mind what I like to term as the four key elements of a winning teaching lab. These are:

  1. Whatever hardware it uses can’t be too expensive. If the board you need for exercises is $1000 then it is too expensive for labs that have multiple platforms. Hardware needs to be $200 or less.
  2. Tools need to be free of charge. It’s difficult for universities to license tools. It costs them money. Even if the charge is low, it still puts a barrier for lecturers having to choose it. All these are suicidal for teaching.
  3. Suitable support. These days it’s usually done through a forum. RVFGA will have an educator forum, and we’ll give answers either through Imagination, our partners, our developers, or through the community so that teachers don’t feel alone.
  4. Excellent teaching materials. You need to go to the best teachers if you want the materials. That will persuade hundreds of teachers to go through your course. Sarah Harris from The University of Nevada is our principal author. She has authored Digital Design and Computer Architecture and we are lucky to have her. Next year we’ll also have a RISC-V edition of her book. With Harris, Daniel Chavez, UCM Madrid is also behind our teaching materials. They are a fantastic team. David Patterson (Vice-Chair of the RISC-V Board of Directors) has blessed this course.

W: Even though this course has been designed primarily for educators, will others who are interested to broaden their knowledge base or learn more about RISC-V be able to benefit from it?

When we did MIPS FPGA, it was academic only. We’re taking a much more liberal approach this time. Even though you have to have a clear target to make the materials work. You must not try to target everyone. Yes, it does have value for people starting out in the industry, people who are looking to upgrade their skills. It will be available through MOOCs.

We’re taking multiple routes. The primary route expect is teachers taking the materials and adopting it for their classes. We are also in active discussions in the U.S. and China to get on to MOOCs. We’re about to launch a mobile graphics course in China on a MOOOC there which will also give us hands-on experience. We will run workshops for teachers to help them in setting up and familiarizing themselves with the course. These will be online, there will be online training videos from us and we’ll run workshops. Companies will also be able to use this course internally just like Imagination plans to do.

W: That's it from our end. Thank you for having us Robert, we've learned a lot through this interview. 

Thank you as well!

Materials for IUP's RVfpga course will be released in English in November and to gain access, those interested will have to sign up for the IUP. Robert will also be giving a webinar on the course in October (link here), and those looking for Sarah Harris and Daniel Chaver's presentation at the RISC-V Global forum, head over here.