Hands-On With The First “Intel 18A” Chips: Panther Lake & Clearwater Forest at Fab 52, Detailed Look at PTL RVP & DevKit, On-Site Demos

At the Tech Tour 2025, we had a hands-on with Intel's first 18A chips, Panther Lake & Clearwater Forest, along with several platforms using them.

Intel 18A Brought To Life With Panther Lake & Clearwater Forest, Here's Our Hands-On

During the Intel Tech Tour 52, we toured the Fab 52, which is the center stage for the deployment and production of next-gen chips fabricated on the 18A process node. It is here that we got to see several wafers and the respective chips based on this next-gen process node. The first products to utilize this process technology will be Panther Lake for clients, followed by Clearwater Forest for servers, both in 2026.

While the Fab 52 tour was guided, we did see the making of Panther Lake and Clearwater Forest wafers on 18A. Following is a little preview of what goes on at Fab 52:

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And then, we have the silicon and wafers:

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Intel Panther Lake with 18A

First up, we have the two distinct Panther Lake configurations that were showcased along with the full-fledged 18A Compute Tile wafer. The Panther Lake 12Xe configuration features the 18A Compute Tile & graphics tile based on the TSMC N3E process node. There is also the smaller Panther Lake 4Xe config & this one utilizes the same 18A compute tile but leverages a graphics tile based on the Intel 3 process tech.

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The 4Xe configuration is obviously the smaller die but retains the 4-tile configuration, which includes the compute tile, graphics tile, I/O or SoC tile, and a filler tile. Just like the 12Xe configuration, the CPU utilizes Intel's Foveros 2.5D packaging.

Panther Lake RVP Motherboard

Intel also had its Panther Lake RVP (Reference Validation Platform) motherboard on display. This board is used to evaluate and validate Panther Lake CPUs ahead of launch, and has already been spotted at other events such as Computex 2025.

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The motherboard features a BGA 2540 socket, which supports Panther Lake-H and Panther Lake-U CPUs. An interesting thing about this motherboard is that it relies on LPCAMM2 memory instead of traditional SO-DIMM modules.

Other than that, it features an 8-phase VRM design, two PCIe slots (x4/x1), various USB ports, voltage readpoints, two USB Type-C ports, & additional headers for troubleshooting and diagnostics. There are also DEBUG LEDs on the motherboard. The motherboard is powered by a single 12-pin EPS connector, or you can use a DC-In jack to boot it up.

Intel also showcased LPCAMM2 modules from Crucial, which they have used on the RVP. The module used carries a capacity of 64 GB and has speeds of up to 7500 MT/s. The specific part number for the modules is "CT64G75C2LP5X.M48C1". Intel has already announced up to 9533 MT/s and up to 96 GB LPCAMM2 support for Panther Lake CPUs.

The RVP motherboards go inside an Intel Reference Validation Platform, which is a large cube-like PC with a screen that is used for enabling platforms and services. It also has several diagnostics and validation options.

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These machines were running a slightly different RVP motherboard with two DDR5 SO-DIMM slots. Each slot features 64 GB capacities and speeds of up to 5600 MT/s (CL46 @ 1.1V). The CPU was attached to a very dense copper-based heatsink with a 9000 RPM active fan cooler.

Panther Lake DevKit & Robotics / Edge Module

The third piece of the Panther Lake platforms used for evaluation and validation was the PTL DevKit. This is a tiny box which can be seen as a Mini PC and features an SFF motherboard with LPCAMM2 memory. This enables developers with the option to tune their applications around Panther Lake, and it is a nice little machine with lots of IO capabilities.

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Lastly, Intel showcased its Panther Lake module designed for robotics/edge platforms. This is a tiny PCB that features the Panther Lake CPU along with four memory sites that are embedded with DRAM. The ones used on the module were from Micron, bearing the "4ZC42 DBFVB" part number.

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The rest of the PCB is bare of components, but it gives you an idea of how the final version will look. The backside will house additional circuitry components along with a connector.

Clearwater Forest With 18A

Intel also showcased its next-gen server chip, Clearwater Forest "Xeon 6+, which features a total of 12 compute tiles fabricated on the 18A process technology. The chip is an advanced packaging solution, leveraging Foveros 3D and EMIB to combine the various tiles.

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While you can only see four tiles or chiplets on the front, the three in the middle house four compute tiles each, while the two on the sides are responsible for IO. There's also the base tile, which houses additional cache. You can read more about Clearwater Forest and its packaging design in our deep dive here.

Besides the chip itself, Intel also showed off its Clearwater Forest Compute Tile wafer. This has several tiny chiplets, each with 24 Darkmont E-Cores.

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Clearwater Forest Server Solutions

Intel's Clearwater Forest "Xeon 6+" CPUs are compatible with LGA 7529 sockets, which are the same used for Xeon 6900P chips. This means that existing Granite Rapids-AP platforms can be upgraded to Xeon 6+ CPUs through drop-in compatibility.

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Servers with Xeon 6+ support shown off during the event included Lenovo's CSPHD350 V4, a single-socket solution with 12 DIMM sites. We also expect to see 2S solutions with up to 24 DIMM sites around the launch timeframe.

Panther Lake & Clearwater Forest Live Demos

As for demos, Intel has a few of those running at its product showcase site. Several Panther Lake OEM / ODM laptops were running various demos, some against Arrow Lake and Lunar Lake CPUs.

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First up is the Multi-tasking Low-Power Island Demo, which evaluates the performance of the low-power island, now with 4 Darkmont E-Cores against Arrow Lake's and Lunar Lake's low-power island. The low-power island is a crucial component in ensuring low power draw in lightweight workloads such as Teams, YouTube Video playback, and MS Office.

The Panther Lake system was consuming similar or lower power than Lunar Lake and around 35% lower than Arrow Lake in this live demonstration. The Panther Lake chip averaged around 7.5-8.0W while Intel's Arrow Lake CPUs averaged around 10.5-11.5W of power. This is a fantastic showcase of the efficiency gains that Intel has made with its Panther Lake CPUs.

The gaming demo was running Painkiller on an Intel Panther Lake 12Xe CPU running at a 45W TDP mode. The game was configured at 1080p "Epic" settings, and was shown running both at native and XeSS MFG modes. At native, the game produced around 50-60 FPS, while with XeSS 3 set to "Ultra Quality Plus", and MFG set to 4x mode, the FPS boosted to over 200, providing a much smoother gameplay. Intel did state that the game was running an early version of the XeSS 3 MFG model, so we can expect improved quality and performance in the final version, which will be available when Panther Lake launches.

Another demo showcases the "Smart Power HDR" mode, which allows Intel's Panther Lake CPUs to drop power down significantly, giving HDR capabilities without using standard HDR power levels. This mode enables around 20% panel luminance power savings (around 30-40 minutes battery life savings) in HDR mode for SDR content. The panels are the main reason why battery life drains faster when viewing SDR content in HDR, so what Intel does is to run an algorithm in the SoC and communicate it to the panel so that the panel can adjust voltage dynamically based on the content.

For Clearwater Forest, Intel showcased a bunch of demos, such as a 5G Control Demo. Here, Clearwater Forest offers over 2x performance for 5G Core workloads versus the Sierra Forest CPUs. In General Compute workloads, Clearwater Forest also delivers substantial gains over the prior generations thanks to its 17% IPC uplift with Darkmont E-Cores, and scaling them to twice as many cores (288 vs 144).

That's about it as far as the hands-on and demo experience is concerned. But this is just the start, with Panther Lake scheduled for CES 2026 and Clearwater Forest scheduled for mid-2026, we can expect more hands-on time and further details in the coming months.

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