AMD’s First ARM CPU To Begin Shipping In The Second Half Of 2015
AMD announced at its Q1 2015 earnings conference call that the company will be shipping its first ever ARM powered CPU this year. More specifically in the second half of 2015. The chip in question is the eight core A57 powered server processor code named Seattle.
Seattle began sampling last year and according to AMD has so far managed to become the most used platform for ARM based sever development. Seattle is primarily targeted towards servers and the embedded market. It was in fact believed for a long time that this chip would be a perfect fit for dense servers. However AMD’s recent exit from that market indicates that this may not have been the case and that a shift in philosophy is taking place at the company.
AMD Seattle Features 8 ARM A57 Cores 12MB of Cache and Dual Channel Memory Interface
Seattle is built on Globalfoundries 28nm process node. It features an eight core design based on the 64bit ARM A57 CPU cores. The chip features 1MB of L2 cache per core pair and 8MB of shared L3 cache accessible to all cores. The chip features support for ECC DDR3 memory with speeds of up to 1866Mhz running on a dual channel memory interface. Seattle also features an ARM security processor and a cryptographic coprocessor. The TrustZone technology enabled by the ARM security processor allow for sensitive tasks to be processed interdependently from the the A57 cores isolating them from any possible security risk.
The cryptographic coprocessor accelerates encryption, decryption, compression and decompression workloads for better performance. In terms of connectivity the chip offers access to 8 SATA 6.0GB/S ports, two 10Gbit Ethernet ports and 8 lanes of PCIE 3.0.
Seattle is a very well-rounded, low power, high efficiency focused server chip. But what’s coming next is perhaps more thrilling. After Seattle AMD is slated to introduce two new sever CPUs. One based on its next generation x86 high performance core code named Zen and one based off its brand new ARMv8 custom core code named K12. Both of which were designed from the ground up by a team of engineers led by Jim Keller. The CPU architect responsible for AMD’s Athlon64 and AthlonXP CPU cores. He left AMD in the early 2000s and was brought back to the company in 2012 by AMD’s Chief Technology Officier Mark Papermaster.
AMD’s recent announcement to exit the small core based dense server market and the company’s increased R&D spending on high performance CPU cores announced last year are all moves for the company to “return to its roots” so to speak. A lot is riding on these investments as they are key to the company’s long term financial success.