Korean chip giant Samsung is reportedly considering outsourcing orders to design a portion of Google's Tensor Processing Unit (TPU) AI chips. Samsung is believed to be Google's manufacturing partner for the TPU chip's input/output (I/O) die. While the TPU's compute tile is expected to be manufactured by TSMC, the part on which the tile will be connected, called the I/O, is said to be Samsung's responsibility. For the I/O, Samsung is considering outsourcing the back-end design for the chip in order to ensure that Google's design is fit for its manufacturing facilities, says the Korean press.
Several Korean Firms in the Running For Google's TPU I/O's Back-end Design, Says Report
Modern day chips typically feature an I/O die and other components such as compute and memory tiles. The latter two are responsible for processing data while the former is responsible for transferring their computations to the motherboard. According to the details, Google's next generation TPU's compute tie will be fabricated by TSMC through the 1.4 nanometer chip manufacturing technology, while Samsung will be responsible for manufacturing the I/O.
Designing the I/O die to meet the chip manufacturer's equipment specifications is called back-end design. According to today's report, Samsung is interested in outsourcing the back-end design for Google's next-generation TPU chip dubbed "Icefish."
This bit comes courtesy of ETNews, which also claims that a high volume of orders for Samsung's foundry business is responsible for the shift. Over the past couple of months, the Korean media has increasingly started to discuss Samsung's large volume of orders and claimed that firms such as Anthropic have placed orders with the firm. ETNews' source outlines that the 2-nanometer orders that TSMC cannot fulfill are being redirected to Samsung.
Among the firms that the report quotes as being the back-end designers are ADTechnology, Gaonchips and Alphachips.
Google's other partners for the TPU chip include MediaTek. The Taiwanese firm has been in the news lately with regard to the TPU primarily due to the packaging technology. Reports have claimed that MediaTek is interested in using Intel's EMIIB-T technology for the TPU's packaging, with analysts believing that the eventual adoption will depend on the packaging technology's yield.
Others, such as investment banks, have claimed that reports claiming Intel's partnership with Google for the TPU are speculative in nature. In fact, JPMorgan has gone as far as to claim that TSMC will manufacture the I/O die with its N3 manufacturing process technology family, along with N2 for the compute die.
About the author: Ramish is a seasoned technology writer and editor with more than a decade of experience. He specializes in semiconductor fabrication and market analysis. With a background in finance and supply chain management - via his bachelors in Finance and a micromasters in supply chain management from MIT - Ramish combines financial rigor with deep industry insight to deliver accurate and authoritative coverage.
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