As rumors suggest that Google is interested in using Intel for its next-generation tensor processing unit (TPU) chips, well known analyst Ming-Chi Kuo has shared his thoughts on the matter. The analyst believes that yields will be a key factor in Google's decision, especially since the technology giant has started to focus on cost savings for the Humufish next-generation TPU's design.
Intel's Yields With The EMIB-T Packaging Technology Will Play Key Role In Google's TPU Orders, Says Analyst
Intel's EMIB-T packaging technology, short for Embedded Multi-die Interconnect Bridge Through Silicon Vias (EMIB-T) relies on using a 'bridge' that is embedded in the organic package substrate. On the other hand, typical chip packaging solutions use a silicon interposer which transfers the signals between the chip on the top and the board at the bottom.
Consequently, EMIB claims to reduce costs over packaging solutions that rely on interposers and prepare larger chip packages. A variant of EMIB is EMIB-T which improves conducitivity by transferring current through Through Silicon Vias (TSVs). TSVs are vertical circuits that connect the chip at the top directly to the package connected to the board below to overcome traditional EMIB's limitation of having current travel around the bridge.
EMIB-T Production Yields Will Be Important In Assessing Technology, Says Analyst
According to Kuo, while Intel's 90% EMIB-T yield is a positive signal, it needs to be watched closely especially since the firm has set a 98% yield benchmark for the technology. This figure is derived from the benchmark figures of Flip Chip Ball Grid Array (FCBGA) production since EMIB is an extension of FCBGA.
The analyst adds that not only is jumping from a 90% yield to a 98% yield significantly more difficult than achieving 90% from 0%, but also that the 90% yield is a validation figure instead of a production figure. As a result, he believes cautious optimism is the better approach when following the packaging technology.
Kuo adds that the reason Google will care about these yields when working with Intel is due to its need to compete with NVIDIA by taking advantage of cost reductions. This has also led Google to inquire TSMC about costs savings should the firm directly tape-out Humufish's main design instead of relying on its partner, MediaTek. A tape-out is the final phase in chip design where the final blueprints are sent to the fabrication firm to start production.
About the author: Ramish is a seasoned technology writer and editor with more than a decade of experience. He specializes in semiconductor fabrication and market analysis. With a background in finance and supply chain management - via his bachelors in Finance and a micromasters in supply chain management from MIT - Ramish combines financial rigor with deep industry insight to deliver accurate and authoritative coverage.
Follow Wccftech on Google to get more of our news coverage in your feeds.
