Rumor: NVIDIA’s Next Generation 5nm GPU Architecture To Be Called Lovelace, Hopper MCM GPU Delayed?
According to the leaker (@kopite7kimi via Videocardz) singlehandedly responsible for pretty much all of the Ampere specs, NVIDIA is working on a next generation GPU architecture based on the mathematician Ada Lovelace. At the same time, it appears that the MCM based Hopper architecture has been delayed for now as it is nowhere to be seen and Lovelace architecture might take its place instead.
NVIDIA next generation Lovelace architecture based on 5nm, Hopper MCM GPU delayed
In many ways, Ada Lovelace can be thought of as the world's first computer enthusiast. She appears to bte first person to have realized that the Analytical Engine proposed by Charles Babbage had applications beyond pure calculation and also published what is thought to be the first algorithim (becoming the first computer programmer) intended to be carried by such a machine. This was almost half a century before Alan Turing would finish their work and invent the general purpose computer during the world war.
NVIDIA has been known to base their architectures on prominent physicsis, mathematicians and scientists and Ada Lovelace is no different. Videocardz actually managed to find a major hint in NVIDIA's own merchandise store that appear to confirm this rumor about Lovelace architecture being the next generation of GPUs from the company. If you look at the heroes showcased during GTC's 2018 keynote you find not only Ada Lovelace but what are potentially all future architectural codenames from NVIDIA. Jensen might have sneakily leaved the entire future roadmap (as far as codenames go) in the GTC'18 keynote.
There are now multiple rumors which seem to suggest that Lovelace architecture will be based on a 5nm process. Since NVIDIA has transitioned to Samsung's foundry, it is unclear whether 5nm refers to a TSMC process or Samsung's. Keep in mind however, that a recent report out of Korea had also confirmed an order on 6nm from NVIDIA - which means that either there is another generation from NVIDIA before Lovelace or that the 6nm process was for the refresh lineup.
5nm is right
— kopite7kimi (@kopite7kimi) December 21, 2020
Kopite, the leaker that is responsible for the vast majority of Ampere related leaks has also stated that Lovelace will be based on 5nm process. Furthermore, he has also stated that Hopper and NVIDIA's MCM based GPU has been delayed for now. This is a major bummer for tech enthusiasts, because an MCM GPU is required to truly push the boundary of performance. If we are staying with monolithic designs, then yields are going to remain a major problem.
I'm afraid the Next-Gen GPU (Hopper) based on MCM was delayed. Is Jensen going to draw a new roadmap instead? It looks very probable.
— kopite7kimi (@kopite7kimi) December 10, 2020
To illustrate this point, I took the liberty of doing the following calculations: taking a die measuring 484mm² (eg: Vega 64) which equates to a die measuring 22mm by 22mm. Splitting this monolithic die into 4x 11mm by 11mm gives you the same net surface area (484mm²) and will also result in yield gains. How much? Let's see. According to the approximation, a 300mm wafer should be able to produce 114 monolithic dies (22x22) or 491 smaller dies (11x11). Since we need 4 smaller dies to equal 1 monolithic part, we end up with 122 484mm² MCM dies. That's a yield gain of 7.6% right there.
The yield gains are even larger for bigger chips. The upper limit of lithographic techniques (with reasonable yields) is roughly 815mm². On a single 300mm wafer, we can get about 64 of these (28.55x28.55) or 285 smaller dies (14.27x14.27). That gives us a total of 71 MCM based dies for a yield increase of roughly 11%. Now full disclosure, this is a very rough approximation and does not take into account several factors such as packaging yields, rectangular die and other shape-based optimization of the wafer etc but the basic idea holds well. Conversely, it also does not take into account increased gains by lowered wastage - a faulty 815mm² monolithic die is much more wasteful than a single 203mm² one! This means this approach has the added benefit of minimizing the impact of defective dies - which will add on to these yield numbers once you factor in unusable dies.
In any case, not much is known about NVIDIA's lovelace architecture except the codename and process and we would advise waiting for more details as always. This post has been marked a rumor since it contains several unconfirmed statements - although I would point out that Kopite has not been wrong yet.
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