MediaTek's new Dimensity 9500s takes an unorthodox approach to mobile chip design: pair older-gen CPU cores with the largest-in-class cache to offset the performance deficit. It's an out-of-the-box strategy that could reshape how chip designers approach non-flagship silicon, especially as DRAM costs continue to climb.
MediaTek has been employing plenty of innovation in recent years to stand out from the crowd. After all, it was the first to jettison efficiency cores in its quest for a performance boost. And now, the Taiwanese chip designer might just make older-gen CPU cores cool again.
The Architecture of MediaTek's Dimensity 9500s vs. Qualcomm's Snapdragon 8 Gen 5
MediaTek's Dimensity 9500s features an all-big-core CPU design. In terms of the core configuration, you are looking at:
- 1x ARM Cortex-X925 up to 3.73GHz with 2MB L2 cache
- 3x ARM Cortex-X4 with 1MB L2 cache
- 4x ARM Cortex-A720 with 512KB L2 cache
GPU:
- Immortalis-G925 MP12 with ray tracing support
Other specs:
- TSMC 3nm (N3E) process node
- MediaTek NPU with agentic AI support
- LPDDR5x RAM
- UFS 4 + MCQ
For comparison, here is the architecture of Qualcomm's Snapdragon 8 Gen 5:
CPU:
- 2x high-performance, third-gen Oryon cores clocked at 3.80GHz
- 6x medium-performance, third-gen Oryon cores clocked at 3.32GHz
GPU:
- Adreno 840 with ray tracing support
Other specs:
- TSMC 3nm (N3P) process node
- Qualcomm Hexagon NPU with agentic AI support
- LPDDR5x RAM
- UFS 4.1 storage
MediaTek Adopted Google Tensor G5's Biggest Shortcoming, Then Countered It With the Largest-in-Class CPU Cache
We noted recently that one of the primary reasons behind the performance discrepancy between MediaTek's Dimensity 9500 and Google's Tensor G5 could be traced back to the fact that the former used ARM's latest cores while the latter decided to go with ARM generic cores that are now over two and a half years old.
Interestingly, MediaTek has used ARM CPU cores on the new Dimensity 9500s that are at least a generation older than the ones used in the Dimensity 9500. As a rule of thumb, newer-gen CPU cores will always trump older-gen ones when it comes to raw performance and efficiency.
But the important thing, though, is what MediaTek did next: it equipped the Dimensity 9500s with the largest-in-class CPU cache of 19MB. The chip also boasts an L3 cache of 12MB and a System Level Cache (SLC) of 10MB.
The reason this development is essential is that a CPU cache boosts efficiency by acting as a bridge between the processor cores and the much slower RAM. It allows the most frequently used data and instructions to be stored directly on the die, thereby reducing the latency and power consumption associated with fetching data from main memory.
It will take a while until serious benchmark scores for the Dimensity 9500s start populating the public airwaves. As such, it will be interesting to see how the chip's gigantic CPU cache affects its efficiency and performance metrics relative to Qualcomm's Snapdragon 8 Gen 5.
If this strategy succeeds, it won't be wrong to say that a lot of chip designers could start turning to older-gen CPU cores to stave off the oncoming DRAM-led cost inflation, especially for their non-flagship chips. MediaTek is betting that a massive cache can paper over the inherent weaknesses in older silicon, and if the benchmarks prove them right, we could be looking at a new design paradigm for the mid-range mobile segment.
About the author: Writing is my one incontrovertible passion. Over the past six years, he has authored over 2,200 distinct articles on financial and tech-related topics, spanning nearly 1 million words. And he has been a member of Wcctech mobile team since 2025. As an alumnus of the University of Toronto, Rotman Commerce Program, I bring nuance, in-depth knowledge, and a unique perspective to every topic that I cover. When I'm not writing, I'm traveling the world, exploring hidden confectionaries and restaurants as an aspiring food connoisseur.
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