Intel Boosts Meteor Lake CPU & Arc Graphics Tile With “Adamantine” L4 Cache

Hassan Mujtaba
Intel To Disclose New Information on 14th Gen Meteor Lake & 15th Gen Arrow Lake CPUs at HotChip 34
14th Gen Meteor Lake CPUs have been pictured in both 'Standard' & 'High-Density' packages. (Image Credits: PC-Watch)

Intel Meteor Lake CPUs will be the first to feature the brand-new Adamantine L4 cache which will give a big boost to the Arc graphics tile.

Intel Meteor Lake Gets Adamantine L4 Cache To Boost Arc Xe-LPG Graphics Performance

A few weeks back, it was reported that Intel was working to implement a new ADM L4 cache on its upcoming 14th-Gen Meteor Lake CPUs. The new cache will come in capacities of several MBs and be targeted primarily at the Arc Xe-LPG GPU which is featured on the graphics tile, one of the many tiles on Meteor Lake GPUs.

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In a patent published by Intel back in 2020, it is mentioned that the Adamantine L4 cache will sit on the base tile and will be accessible to the rest of the IPs and tiles on the interposer. This design will be fully utilized by the Meteor Lake-M and Meteor Lake-P chips which target the mobility platform.

Coelacanth-Dream also explains why the Intel Arc Xe-LPG GPUs will be the main beneficiary of the Adamantine L4 cache. In recent patches, discovered by Phoronix, it was revealed that, unlike the previous designs, Intel Meteor Lake GPU cannot utilize the LLC on the chip which was previously shared by both the CPU and GPU. As such, the Adamantine L4 cache will play a huge role to assist the performance of Meteor Lake chips in graphics workloads.

Since the Adamantine L4 cache can also be used by the Compute Title (CPU Cores), which are made up of Redwood Cove (P-Core) & Crestmont (E-Core) hybrid configurations, it can lead to faster boot times and overall lower latencies compared to moving data to the primary DRAM. The patent states that:

Next generation client SoC architectures may introduce large on-package caches, which will allow novel usages. Access time for the L4 (e.g., “Adamantine” or “ADM”) cache may be much less than the DRAM access time, which is used to improve host CPU and security controller communications. Embodiments help to protect innovations in boot optimization. Value is added for high end silicon with higher pre-initialized memory at reset, potentially leading to increased revenue. Having memory available at reset also helps to nullify legacy BIOS assumptions and make a faster and efficient BIOS solution with a reduced firmware stage (e.g., pre-CPU reset stage, IBBL stage and IBB stage) for modern device use cases like Automotive IVI (in-vehicle infotainment, e.g., turn on rear view camera within 2 sec), household and industrial robots, etc. Accordingly, new market segments may be available.

Intel Patent (Early Platform Hardening Technology For Slimmer And Faster Boot)

As a rumor, Moore's Law is Dead points out to the Adamantine L4 cache being used by Intel in both Meteor Lake CPUs and Battlemage GPUs. It is mentioned that while the current Meteor Lake chips are outfitted with 128 - 512 MB of Adamantine L4 cache, it can be expanded into GBs. The L4 cache makes perfect sense if Intel wants to offer a boost in graphics performance since the competition is also going to implement its own on-die cache in upcoming products such as the Ryzen 8000 Strix APUs.

The Intel 14th Gen Meteor Lake CPUs are scheduled to hit laptops first in the second half of 2023. There are also reports of Chipzilla sampling its first desktop parts to clients and OEMs.

Intel Mobility CPU Lineup:

CPU FamilyPanther LakeLunar LakeArrow LakeMeteor LakeRaptor LakeAlder Lake
Process Node (CPU Tile)Intel 18ATSMC N3BTSMC N3BIntel 4Intel 7Intel 7
Process Node (GPU Tile)TSMC N3E / Intel 3TSMC N3BTSMC 5nmTSMC 5nmIntel 7Intel 7
CPU ArchitectureHybridHybrid (Dual-Core)Hybrid (Triple-Core)Hybrid (Triple-Core)Hybrid (Dual-Core)Hybrid (Dual-Core)
P-Core ArchitectureCougar CoveLion CoveLion CoveRedwood CoveRaptor CoveGolden Cove
E-Core ArchitectureDarkmontN/ASkymontCrestmontGracemontGracemont
LP E-Core Architecture (SOC)DarkmontSkymontCrestmontCrestmontN/AN/A
Top Configuration (Compute Tile)4+8 (H-Series)4+4 (MX Series)6+8 (H-Series)
2+8 (U-Series)
6+8 (H-Series)
2+8 (U-Series)
6+8 (H-Series)
8+16 (HX-Series)
6+8 (H-Series)
8+8 (HX-Series)
Max Cores / Threads16/168/814/1414/2014/2014/20
AI NPUNPU5 (50 TOPS)NPU4 (48 TOPS)NPU3.5 (13 TOPS)NPU3 (11 TOPS)NPU2 (7 TOPS)NPU2 (7 TOPS)
Planned LineupCore Ultra 300Core Ultra 200VCore Ultra 200Core Ultra 10014th/13th Gen12th Gen
GPU ArchitectureXe3-LPG (Battlemage)Xe2-LPG (Battlemage)Xe-LPG+ (Alchemist)Xe-LPG (Alchemist)Iris Xe (Gen 12)Iris Xe (Gen 12)
Xe Cores (Max)12 Xe3 Cores8 Xe2 Cores8 Xe Cores8 Xe Cores96 EUs (768 Cores)96 EUs (768 Cores)
Memory SupportLPDDR5X-9600LPDDR5X-8533DDR5-5600
LPDDR5-7500
LPDDR5X-8533
DDR5-5600
LPDDR5-7400
LPDDR5X - 7400+
DDR5-5200
LPDDR5-5200
LPDDR5-6400
DDR5-4800
LPDDR5-5200
LPDDR5X-4267
Memory Capacity (Max)128 GB32 GB128 GB96 GB64 GB64 GB
Thunderbolt SupportTB5TB5TB5TB4TB4TB4
WiFi CapabilityWiFi 7WiFi 7WiFi 7WiFi 6EWiFi 6EWiFi 6E
TDP17-45W17-30WTBD7W-45W15-55W15-55W
Launch2H 20252H 20242H 20242H 20231H 20231H 2022

News Source: VideoCardz

Hassan Mujtaba Photo

About the author: A Software Engineer by training and a PC enthusiast by passion, Hassan Mujtaba serves as Wccftech's Senior Editor for hardware section. With years of experience in the industry, he specializes in deep-dive technical analysis of next-generation CPU and GPU architectures, motherboards, and cooling solutions. His work involves not only breaking news on upcoming technologies but also extensive hands-on reviews and benchmarking.

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