Intel Confirms Design To Succeed Xe HP ‘Father Of All’ GPU Already Underway, Going All Out With MCM Approach


We have had a ton of disclosures in the last couple of days and Intel's Chief Architect just dropped another bomb: the Intel Xe HP GPU pictured yesterday, aka the 'Father Of All' GPUs already has a successor in the works and is undergoing the design phase right now. This not only confirms the existence of an Intel masterplan involving a multi-layered approach to building MCM GPUs but also means the GPU pictured yesterday likely was NOT Ponte Vecchio but a consumer-grade variant! Pay attention, AMD, or you might just be beaten at your own game.

Intel masterplan: 'Baahubali of All' MCM GPU is in the design phase right now; is this the 7nm Ponte Vecchio GPU?

It seems for the first time, my knowledge of Hindi/Urdu is proving useful for my day job. Baahubali is a term that essentially means "one who has strength in this arms" if used as a noun. The word "Baahu" means arms and "bali" means strength. In this case, however, it might actually be used to refer to the superhero/epic film that Raja was involved in. In other words, and in a context that our readers will understand - Raja just referred to a GPU under design, a GPU that will succeed 'the father of all' GPU as the "Superman of All" GPU.

He also seems to have dropped a subtle hint about the timing of this GPU. Raja expects that the time to market for this particular GPU will be shorter than the delay between the announcement (and launch) of the Baahubali movie - which was roughly 1 year. Is this the Ponte Vecchio GPU on the 7nm process? Very likely. The timing absolutely fits. This also means that the GPU we saw yesterday *was actually* a consumer-grade variant and not an enterprise one! That is absolutely insane.

ICYMI: Recap on the Intel Xe "Father of All" MCM GPU pictured yesterday

Back in December 2019 (which seems almost a lifetime away), Raja Koduri sent out the following tweet with his team in Bangalore "crossing a significant milestone" in designing what is easily one of the largest silicons in the world. The key takeaway here, however, was that this is the Intel Xe HP GPU as Raja clearly states in his tweet. He christened this GPU, "the baap of all", which is Hindi/Urdu for "father of all".

Fast forward a few months, and he recently tweeted the following deck and interestingly, the package features an LGA design. This might just be for testing purposes or could be the actual delivery format for enterprise uses. X (Chi) is the next letter after Phi after all - if you know what I mean. Raja also confirmed the support of 16-bit float with this tweet for the Intel Xe HP GPU - which is pretty essential for AI and deep learning applications.

I absolutely love the fact that the camera is stationed almost perfectly centered and a convenient scale reference is given as well. It's almost as if Raja *wants* us sleuths to figure things out. Well, firing up our trusty pixel counting algos, and using the conservative estimate for an AA battery (49.2mm in length), we arrived at the following estimations (customary warning: small deviations in perspective and skewness can result in large deviations in the final numbers, the numbers given here are just for early reference purposes):

The shaded area under the heat spreader is roughly 2373mm² large.

The entire chip measured a resounding 3696mm² in our calculation. It is roughly 1 double AA cell in length and roughly 53.6% larger than a double AA cell in width. This results in an estimation of 48.9mm by 75.6mm for the height and width respectively. We also calculated the usable area under the heat spreader, which came out to roughly 2373mm². Assuming Intel isn't going for too tight a fit, you are easily looking at the actual silicon surface area hitting the 2000mm² mark! This is absolutely insane and will truly be the baap of all.

[Speculation] If we assume that Intel is utilizing close to the full heat spreader area of 2000mm² (and keep in mind they could easily be far under this limit right now), we can also arrive at a rough estimate of tiles. While it is unclear at this time how Intel Xe HP connects with Intel's Ponte Vecchio GPU, if the two are connected and/or similar, then we are probably looking at either 4 tiles with 500mm² or 8 tiles with 250mm² to achieve the maximum surface area [/speculation]. Ponte Vecchio is slated to arrive in 2021 and will be built on the 7nm process.

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