Another AMD EPYC Genoa ‘Zen 4’ CPU Leaks Out, This Time A 16 Core Chip With 2 Active CCDs

Jan 10, 2022 at 07:19am EST
Another AMD EPYC Genoa 'Zen 4' CPU Leaks Out, This Time A 16 Core Chip With 2 Active CCDs

Another AMD EPYC Genoa CPU has been pictured which comes with 16 cores within two Zen 4 Core Complex Dies.

AMD EPYC Genoa CPU With 16 Zen 4 Cores In Two Next-Gen 5nm Core Complex Dies Pictured

The latest pictures were obtained by Videocardz and show X-Ray shots of what lies underneath the massive Genoa IHS. Another AMD EPYC Genoa CPU had just leaked out a few weeks earlier and this new one shows proves that the first samples are already being sent out to customers that in HPC & Cloud Computing segments.

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AMD EPYC Genoa 16 Zen 4 Core CPU Leak (Image Credits: Videocardz):

As for the CPU itself, the AMD EPYC Genoa chip is based around the SP5 socket which features a total of 6096 LGA contacts, the highest ever on any server chip at the moment. It comes with a total of 16 cores and 32 threads based on the Zen 4 architecture which utilizes the latest TSMC 5nm node. This is particularly an entry-level configuration as it only features two of the twelve CCDs. The full fat configuration will feature 12 Zen 4 CCDs with 8 cores per CCD for a total of 96 cores. As per ExecutableFix, this sample is either the OPN 100-000000627-08 (ES0) or OPN 100-000000627-12 (ES1) variant. Aside from these, the insider has also reported OPNs for the 96 Core and 32 core variants which are 100-000000475-16 and 100-000000479-10, respectively.

AMD's EPYC Genoa CPU has been pictured in X-ray, featuring 2 CCDs with 16 Zen 4 cores. (Image Credits: Videocardz)

The CPU itself consumes 195W power and has a maximum boost clock of up to 3.7 GHz. These are not the final clock speeds as we can expect a 16 core variant with over 4.0 GHz clock speeds in the final lineup. As noted in the leaked EPYC Genoa documents, the 16 core part would also come in 5 chiplet configurations, featuring four partially disabled Zen 4 CCDs with 4 cores each, a 195W TDP, a 116W power for the IOD, and a 3.3W LGA power design. Other than that, the socket itself will be divided into four segments, each with 1520 contact pads.

AMD EPYC Genoa CPUs - 5nm Zen 4 & Up To 96 Cores In 2022

Starting with the details, AMD has already announced that EPYC Genoa would be compatible with the new SP5 platform which brings a new socket so SP3 compatibility would exist up till EPYC Milan. The EPYC Genoa processors would also feature support for new memory and new capabilities. In the latest details, it is reported that the SP5 platform will also feature a brand new socket that will feature 6096 pins arranged in the LGA (Land Grid Array) format. This will be by far the biggest socket that AMD has ever designed with 2002 more pins than the existing LGA 4094 socket.

AMD EPYC Milan Zen 3 vs EPYC Genoa Zen 4 Size Comparisons:

CPU NameAMD EPYC MilanAMD EPYC Genoa
Process NodeTSMC 7nmTSMC 5nm
Core ArchitectureZen 3Zen 4
Zen CCD Die Size80mm272mm2
Zen IOD Die Size416mm2397mm2
Substrate (Package) AreaTBD5428mm2
Socket Area4410mm26080mm2
Socket NameLGA 4094LGA 6096
Max Socket TDP450W700W

The socket will support AMD's EPYC Genoa and future generations of EPYC chips. Talking about Genoa CPUs themselves, the chips will pack a mammoth 96 cores and 192 threads. These will be based on AMD's brand new Zen 4 core architecture which is expected to deliver some insane IPC uplifts while utilizing the TSMC 5nm process node.

To get to 96 cores, AMD has to pack more cores in its EPYC Genoa CPU package. AMD is said to achieve this by incorporating a total of up to 12 CCD's in its Genoa chip. Each CCD will feature 8 cores based on the Zen 4 architecture. That aligns with the increased socket size and we could be looking at a massive CPU interposer, even larger than the existing EPYC CPUs. The CPU is said to feature TDPs of 320W which will be configurable up to 400W. You can find more details regarding the SP5 platform here.

Other than that, it is stated that AMD's EPYC Genoa CPUs will feature 128 PCIe Gen 5.0 lanes, 160 for a 2P (dual-socket) configuration. The SP5 platform will also feature DDR5-5200 memory support which is some insane improvement over the existing DDR4-3200 MHz DIMMs. But that's not all, it will also support up to 12 DDR5 memory channels and 2 DIMMs per channel which will allow up to 3 TB of system memory using 128 GB modules.

The main competitor of AMD's EPYC Genoa lineup would be Intel's Sapphire Rapids Xeon family which is expected to launch in 2022 too with PCIe Gen 5 and DDR5 memory support. The lineup was recently rumored to not get a volume ramp until 2023 which you can read more about over here. Overall, AMD's Genoa lineup seems to be in great form after this leak and could be a major disruption for the server segment if AMD plays its cards right till Genoa's launch by 2022.

AMD EPYC CPU Families:

Family NameAMD EPYC VeranoAMD EPYC VeniceAMD EPYC Turin-XAMD EPYC Turin-DenseAMD EPYC TurinAMD EPYC SienaAMD EPYC BergamoAMD EPYC Genoa-XAMD EPYC GenoaAMD EPYC Milan-XAMD EPYC MilanAMD EPYC RomeAMD EPYC Naples
Family BrandingEPYC 9007EPYC 9006EPYC 9005EPYC 9005EPYC 9005EPYC 8004EPYC 9004EPYC 9004EPYC 9004EPYC 7004EPYC 7003EPYC 7002EPYC 7001
Family Launch2027202620252025202420232023202320222022202120192017
CPU ArchitectureZen 7Zen 6Zen 5Zen 5CZen 5Zen 4Zen 4CZen 4 V-CacheZen 4Zen 3Zen 3Zen 2Zen 1
Process NodeTBD2nm TSMC4nm TSMC3nm TSMC4nm TSMC5nm TSMC4nm TSMC5nm TSMC5nm TSMC7nm TSMC7nm TSMC7nm TSMC14nm GloFo
Platform NameSP7SP7SP5SP5SP5SP6SP5SP5SP5SP3SP3SP3SP3
SocketTBDTBDLGA 6096 (SP5)LGA 6096 (SP5)LGA 6096LGA 4844LGA 6096LGA 6096LGA 6096LGA 4094LGA 4094LGA 4094LGA 4094
Max Core CountTBD9612819212864128969664646432
Max Thread CountTBD19225638425612825619219212812812864
Max L3 CacheTBDTBD1536 MB384 MB384 MB256 MB256 MB1152 MB384 MB768 MB256 MB256 MB64 MB
Chiplet DesignTBD8 CCD's (1 CCX per CCD) + 2 IOD?16 CCD's (1CCX per CCD) + 1 IOD12 CCD's (1CCX per CCD) + 1 IOD16 CCD's (1CCX per CCD) + 1 IOD8 CCD's (1CCX per CCD) + 1 IOD12 CCD's (1 CCX per CCD) + 1 IOD12 CCD's (1 CCX per CCD) + 1 IOD12 CCD's (1 CCX per CCD) + 1 IOD8 CCD's (1 CCX per CCD) + 1 IOD8 CCD's (1 CCX per CCD) + 1 IOD8 CCD's (2 CCX's per CCD) + 1 IOD4 CCD's (2 CCX's per CCD)
Memory SupportTBDDDR5-12800DDR5-6000?DDR5-6400DDR5-6400DDR5-5200DDR5-5600DDR5-4800DDR5-4800DDR4-3200DDR4-3200DDR4-3200DDR4-2666
Memory ChannelsTBD16-Channel (SP7)12 Channel (SP5)12 Channel12 Channel6-Channel12 Channel12 Channel12 Channel8 Channel8 Channel8 Channel8 Channel
PCIe Gen SupportTBD128-192 PCIe Gen 6TBD128 PCIe Gen 5128 PCIe Gen 596 Gen 5128 Gen 5128 Gen 5128 Gen 5128 Gen 4128 Gen 4128 Gen 464 Gen 3
TDP (Max)TBD~600W500W (cTDP 600W)500W (cTDP 450-500W)400W (cDP 320-400W)70-225W320W (cTDP 400W)400W400W280W280W280W200W

About the author: A Software Engineer by training and a PC enthusiast by passion, Hassan Mujtaba serves as Wccftech's Senior Editor for hardware section. With years of experience in the industry, he specializes in deep-dive technical analysis of next-generation CPU and GPU architectures, motherboards, and cooling solutions. His work involves not only breaking news on upcoming technologies but also extensive hands-on reviews and benchmarking.

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