AMD Zen 6 Architecture Rumored To Power EPYC Venice Server CPUs: Over 200 Cores, Completely Redesigned L2/L3 Cache & HBM SKUs

The successor to AMD's EPYC Turin CPUs which will feature Zen 5 cores is rumored to be called EPYC Venice and will feature Zen 6 architecture, reports Moore's Law is Dead.

AMD EPYC Venice Server CPUs Rumored To Feature Over 200 Zen 6 Cores With Redesigned L2/L3 Cache & HBM SKUs

While the details are quite vague at the moment considering this product isn't expected to launch till 2025+, it looks like MLID got his hands on very early details regarding the codename and AMD's marketing has come up with 'Venice' for its next-generation EPYC lineup. Named after the capital of the Veneto region in northeastern Italy, the EPYC Venice lineup is expected to be a huge update for servers.

Some details that are shared include references to the AMD Zen 6 cores though it is not known if the red team will continue with its Zen naming scheme beyond 2025 or move to something else. The server segment will continue with the EPYC naming convention. It is said that Zen 6 or the x86 architecture after Zen 5 will make use of a very hybrid core design approach and can offer over 200 cores (a conservative estimate) with rumors of up to 384 cores per socket. There's no mention if the CPU will be compatible with the SP5 platform but it looks like Turin and its follow-up on Zen 5C might be the last EPYC chips for the upcoming platform. The SP5 socket will last till 2025 which is a good timeframe to provide an update.

As for the upgrades in the architecture itself, the leaker also stated that the AMD is expected to completely redesign the L2 and L3 cache system. The Infinity Cache architecture will also see a major change. Also, HBM will become the standard across most of the lineup and the memory standard will play a huge role in next-generation EPYC CPUs. The on-board HBM hybrid design integrated within EPYC can be used to scale IPC within the same core count. One interesting and key detail is that Tom also expects Zen 5-based EPYC offerings to be amongst the first AMD EPYC server products to feature HBM designs while EPYC Venice will standardize it across multiple SKUs.

In the end, while all of this sounds great, one should remember we are talking about products that launch 3-4 years from now and a lot can change in the meantime. But it looks like EPYC Venice from AMD might indeed be a thing and we can't wait to see it in action a few years from now!

AMD EPYC CPU Families:

Family Name	AMD EPYC Verano	AMD EPYC Venice	AMD EPYC Turin-X	AMD EPYC Turin-Dense	AMD EPYC Turin	AMD EPYC Siena	AMD EPYC Bergamo	AMD EPYC Genoa-X	AMD EPYC Genoa	AMD EPYC Milan-X	AMD EPYC Milan	AMD EPYC Rome	AMD EPYC Naples
Family Branding	EPYC 9007	EPYC 9006	EPYC 9005	EPYC 9005	EPYC 9005	EPYC 8004	EPYC 9004	EPYC 9004	EPYC 9004	EPYC 7004	EPYC 7003	EPYC 7002	EPYC 7001
Family Launch	2027	2026	2025	2025	2024	2023	2023	2023	2022	2022	2021	2019	2017
CPU Architecture	Zen 7	Zen 6	Zen 5	Zen 5C	Zen 5	Zen 4	Zen 4C	Zen 4 V-Cache	Zen 4	Zen 3	Zen 3	Zen 2	Zen 1
Process Node	TBD	2nm TSMC	4nm TSMC	3nm TSMC	4nm TSMC	5nm TSMC	4nm TSMC	5nm TSMC	5nm TSMC	7nm TSMC	7nm TSMC	7nm TSMC	14nm GloFo
Platform Name	SP7	SP7	SP5	SP5	SP5	SP6	SP5	SP5	SP5	SP3	SP3	SP3	SP3
Socket	TBD	TBD	LGA 6096 (SP5)	LGA 6096 (SP5)	LGA 6096	LGA 4844	LGA 6096	LGA 6096	LGA 6096	LGA 4094	LGA 4094	LGA 4094	LGA 4094
Max Core Count	TBD	96	128	192	128	64	128	96	96	64	64	64	32
Max Thread Count	TBD	192	256	384	256	128	256	192	192	128	128	128	64
Max L3 Cache	TBD	TBD	1536 MB	384 MB	384 MB	256 MB	256 MB	1152 MB	384 MB	768 MB	256 MB	256 MB	64 MB
Chiplet Design	TBD	8 CCD's (1 CCX per CCD) + 2 IOD?	16 CCD's (1CCX per CCD) + 1 IOD	12 CCD's (1CCX per CCD) + 1 IOD	16 CCD's (1CCX per CCD) + 1 IOD	8 CCD's (1CCX per CCD) + 1 IOD	12 CCD's (1 CCX per CCD) + 1 IOD	12 CCD's (1 CCX per CCD) + 1 IOD	12 CCD's (1 CCX per CCD) + 1 IOD	8 CCD's (1 CCX per CCD) + 1 IOD	8 CCD's (1 CCX per CCD) + 1 IOD	8 CCD's (2 CCX's per CCD) + 1 IOD	4 CCD's (2 CCX's per CCD)
Memory Support	TBD	DDR5-12800	DDR5-6000?	DDR5-6400	DDR5-6400	DDR5-5200	DDR5-5600	DDR5-4800	DDR5-4800	DDR4-3200	DDR4-3200	DDR4-3200	DDR4-2666
Memory Channels	TBD	16-Channel (SP7)	12 Channel (SP5)	12 Channel	12 Channel	6-Channel	12 Channel	12 Channel	12 Channel	8 Channel	8 Channel	8 Channel	8 Channel
PCIe Gen Support	TBD	128-192 PCIe Gen 6	TBD	128 PCIe Gen 5	128 PCIe Gen 5	96 Gen 5	128 Gen 5	128 Gen 5	128 Gen 5	128 Gen 4	128 Gen 4	128 Gen 4	64 Gen 3
TDP (Max)	TBD	~600W	500W (cTDP 600W)	500W (cTDP 450-500W)	400W (cDP 320-400W)	70-225W	320W (cTDP 400W)	400W	400W	280W	280W	280W	200W

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