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According to a report in the Taiwanese press, Taiwan's contract chip manufacturer TSMC turned down NVIDIA CEO Jensen Huang's request to set up a dedicated packaging manufacturing line for NVIDIA's products. Along with semiconductor fabrication, chip packaging has become an equally important part of the industry's rush to ship thousands of. AI chips worldwide. However, unlike fabrication capacity, packaging has struggled to meet the elevated demand for chips, making TSMC, the world's largest contract chip manufacturer, dedicate considerable resources towards it. TSMC's latest earnings call also focused on packaging, with the firm choosing to redefine its market to add the higher revenues from assembling chips in addition to manufacturing them.
NVIDIA CEO's Request Asking TSMC To Establish Dedicated CoWoS Packaging Line Led To Tense Discussions Says Report
According to the details, NVIDIA's CEO Jensen Huang visited TSMC's headquarters earlier this year as part of his visit to Taiwan, where he also met TSMC's founder, Dr. Morris Chang, and the firm's former chairman. According to the sources, his visit to the firm's headquarters was more colorful as it led Huang to request TSMC set up a dedicated packaging line for NVIDIA's GPUs.
The report shares sparse details of the encounter and highlights that the discussions between Huang and TSMC's managers were quite tense. The latter peppered Huang with a series of questions regarding the request. According to the sources, the talks were unfruitful, and the atmosphere inside the meeting room was tense.
Packaging constraints were among the earliest headwinds to the AI revolution that analysts worried about during the early days of the current hype in 2023. TSMC has struggled to contain the demand for its packaging products, with reports claiming that the firm has reserved its entire packaging capacity for NVIDIA and its smaller rival AMD.
The rise of packaging in the semiconductor value chain was clear during TSMC's earnings call for the second quarter. At the event, CEO Dr. C.C. Wei started his opening remarks by sharing that his firm is upgrading its definition of the foundry industry to Foundry 2.0. As opposed to pure play chip fabrication, Dr. Wei's upgraded definition also includes "packaging, testing, mask-making, and others, and all IDM excluding memory manufacturing."
Semiconductor fabrication is typically divided into two categories. These are front end and back end fabrication. Front end refers to the process of printing circuits on silicon and associated operations. Back end refers to all all operations carried out after fabrication is complete, including packaging. Using this term, Wei added during the call that "TSMC will only focus on the most advanced back-end technologies, which help our customers in leading-edge products."
Foundry 2.0 adds $100 billion to the total size of the semiconductor industry in 2023, as it encompasses $250 billion of revenue taking opportunities, outlined the TSMC executive. He added that TSMC held 28% of this market in 2023 and plans to grow this share this year. CoWoS packaging capacity, which includes final stage processes of an NVIDIA chip post fabrication, is tight this year and will only start to ease in 2026 , shared Wei. However, the growth in packaging demand has also improved TSMC's packaging margin, which were previously lower than the company average.
About the author: Ramish is a seasoned technology writer and editor with more than a decade of experience. He specializes in semiconductor fabrication and market analysis. With a background in finance and supply chain management - via his bachelors in Finance and a micromasters in supply chain management from MIT - Ramish combines financial rigor with deep industry insight to deliver accurate and authoritative coverage.
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