TSMC To Boost 3nm Yield & Production Next Year Claim Sources

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The Taiwan Semiconductor Manufacturing Company (TSMC) continues to make progress on its N3E semiconductor manufacturing technology according to a fresh report from the Taiwanese press. TSMC is the world's largest contract chip manufacturer and it is currently in the process of upgrading its technologies to the 3-nanometer chip node. Its progress with the new technology has raised concerns in the market, with several rumors claiming that TSMC is struggling with production efficiency. However, these rumors have also been countered by other reports, and the one we've managed to come across today joins those in stating that the 3nm technology is on track.

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Today's report is courtesy of the Taiwanese publication UDN, which quotes sources from within TSMC's supply chain to report on the status of the 3nm process. TSMC has dubbed the different technologies under this family under the 'N3' tag, and so far, two variants, N3E and N3B are believed to be on their way to the production lines.

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It suggests that TSMC will accelerate the volume production of the N3E process next year, with the first products expected to head to the Cupertino, California consumer electronics giant Apple, Inc. Apart from Apple, Qualcomm Incorporated and Intel Corporation are also reportedly part of the fab's N3E customer base. This variant is the second generation of the N3 process, and it is expected to be introduced after the N3B node.

Additionally, while admitting that the company encountered bottlenecks with the 3nm process, UDN reports that these have benefited from the process of improving the process. Particularly, the research and development conducted to improve 3nm have resulted in synergies with the 2nm process. While TSMC's 3nm node will use the traditional FinFET transistor designs, the 2nm node will use a new design dubbed GAAFET.

Samsung Foundry's diagram shows the evolution of a transistor from FinFET to GAAFET and then MBCFET.The 3nm process from the Korean company will utilize GAAFET transistors, which it has developed in partnership with International Business Machines Corporation (IBM). However, Samsung's production efficiency has long raised some questions in the industry for its previous chip technologies. Image: Samsung Electronics

It also shares details about TSMC's production plans for the 3nm process. UDN's sources believe that the company's plant in Taiwan's Nanke sector will manufacture the chips for Apple, its plant in Hsinchu will make them for Intel, and when combined, the 3nm production strategy will mark the first time TSMC manufactures a process technology in Taiwan's North and South regions at the same time.

Furthermore, it also lists down a figure for estimated 3nm output levels. A report from another Taiwanese publication Digitimes that had surfaced earlier this month stated that the initial 3nm production will range between 40,000 and 50,000 wafers per month. UDN reports that the Nanke plant will manufacture 15,000 3nm wafers per month while the Hsinchu center will have an output ranging between 10,000 and 20,000 wafers per month. It adds to outline that N3E output might reach 50,000 monthly wafers next year, with initial capacity hinted to stand at 25,000 wpm.

Finally, the Hsinchu facility reported to manufacture the chips for Intel will also mark the first time TSMC converts a research and development center into a production line. This center had initially been responsible only for trial production, and this purported conversion indicates the nature of TSMC's relationship with Intel, and the impact these orders will have had on the fab's existing 3nm capacity allocation. TSMC plans to accelerate 3nm yield next year alongside increasing output believe supply chain sources.