Kioxia, which was formally known as Toshiba Memory, has hopefully created a successor to 3D NAND flash, which offers increased storage density compared to QLC NAND flash. This new technology, which was announced Thursday, allows memory chips to have smaller cells and more storage per cell, which can significantly increase the memory density per cell.
Kioxia (formally Toshiba Memory) has created a potential successor to 3D NAND Flash storage
Last Thursday, Kioxia announced the world's first "three-dimensional semicircular split-gate flash memory cell structure," which is named Twin BiCS Flash. This is different from Kioxia's other product BiCS5 Flash. BiCS5 flash uses circular charge trap cells, while the Twin BiCS Flash uses semi-circular floating gate cells. The new structure enlarges the window for programming the cell, even though the cells are physically smaller when compared to the CT technology.
The Twin BiCS flash is the best option currently to succeed in QLC NAND technology, although the future implementation of this chip is still unknown. This newer chip significantly increases flash memory storage, which has been a big issue for manufacturers, although there are currently three schools of thought on how to rectify this.
The popular way to increase NAND flash density, one way to increase the memory layers, which has been envisioned by the manufacturer, which has been envisioning 500 and 800-layer NAND chips. Manufacturers recently passed 96-layers NAND flash chips and achieved 128-bit NAND flash chips. Another way to increase NAND flash density is to decrease the cell size, which allows for more cells to be fit into a single layer.
The final way to increase NAND flash density is to improve the overall bits per cell, which is the most commonly used by manufacturers. This way has given us SLC, MLC, TLC, and the most recent being QLC NAND each increasing the number of bits per cell by one compared to the previous technology.
This newer technology, the Twin BiCS Flash, is still in the research and development phase and is many years away from being implemented. Although BiCS5 128-layer NAND flash chips are planned to released in 2020, manufacturers, SK Hynix, and Samsung were able to pass the 100-layer milestone earlier in 2019, with the 128-layer 4D NAND and V-NAND v6.