Intel Xeon 6900P "Granite Rapids" CPUs will launch in Q3 2024 with up to 128 cores while Xeon 6900E CPUs bring up to 288 cores in Q1 2025.
Intel Xeon 6 Granite Rapids"6900P" & Sierra Forest "6900E" CPUs Coming To Servers, 128 P-Cores In Q3 2024 & 288 E-Cores In Q1 2025
In contrast to the Xeon E-Core offerings, the P-Core offerings are optimized for performance in compute-intensive and AI workloads such as HPC, Database & Analytics, AI, Networking, Edge, & Infrastructure/Storage. Both CPUs share a common platform foundation & shared software stack.
Before diving into the details, Intel provides us with a brief layout of its performance uplifts with the Xeon 6900P lineup which is as follows:
- AI (Up To 2.0x)
- HPC (Up To 2.3x)
- General Compute (Up To 2.0x)
For its Xeon 6 P-Core lineup, codenamed Granite Rapids, Intel will be starting big. Right off the bat, we will be getting the highest-end configurations in the Xeon 6900P family (Q3 2024) with the rest of the lineup Xeon 6700P & Xeon 6300P launching in Q1 2025 alongside the higher-end Xeon 6900E "Sierra Forest" chips.
Intel Xeon 6 CPU Configurations: XCC, HCC, LCC With Up To 288 E-Cores & 128 P-Cores
The Intel Xeon 6900 series are chiplet-heavy design with as many as 4 chiplets for the Xeon 6900E "Sierra Forest" E-Core CPUs and as many as five chiplets for the Xeon 6900P "Granite Rapids" P-Core CPUs. Also, while the Xeon 6700E CPUs are based on a singular die configuration, the Xeon 6700E SKUs will come in three distinct flavors. These include an LCC die with a single compute die for up to 16 cores, the HCC die with a single yet bigger compute die with up to 48 cores and the XCC die with two compute tiles for up to 86 cores.
The XCC tile for the Xeon 6900P CPUs comes in triple compute tile configurations with up to 128 cores. The CPU itself can offer up to 144 cores but it is slightly disabled due to yields. Following is how the lineup stacks up:
- Xeon 6900P (XCC SKU) - 3 Compute Tiles + 2 IO Tiles = Up To 128 Cores
- Xeon 6700P (XCC SKU) - 2 Compute Tiles + 2 IO Tiles = Up To 86 Cores
- Xeon 6500P (HCC SKU) - 1 Compute Tiles + 2 IO Tiles = Up To 48 Cores
- Xeon 6300P (LCC SKU) - 1 Compute Tiles + 2 IO Tiles = Up To 16 Cores
- Xeon 6900E (XCC SKU) - 2 Compute Tiles + 2 IO Tiles = Up To 288 Cores
- Xeon 6700E (HCC SKU) - 1 Compute Tiles + 2 IO Tiles = Up To 144 Cores
Some of the interesting features of the modular compute die architecture have also been laid out which include:
- Monolithic Mesh enables direct access between agents within the socket
- Modularity and flexible routing allow per-die definition of rows and columns
- The last-Level cache shared with all cores can be partitioned into per-die sub-numa clusters
- Fabric distributes IO traffic across multiple columns to ease congestion
- Global infrastructure is modular and hierarchical
- EmiB technology extends the high-speed fabric across all dies in the package
Intel Xeon 6E With Sierra Glen & Xeon 6P With Redwood Cove Core Architecture
As for the architecture, the Intel Xeon P-Core (Granite Rapids) family will employ Redwood Cove cores with hyper-threading (2 threads per core), feature 2 MB of L2 cache per core, AVX-512 (2x512), Intel AMX and vector operations support, 64 KB L1i and 48 KB L1d cache, an 8-wide decode, 6-wide allocate, 8-wide instruction retire design with 512 instruction out-of-order execution engine and 1024 BF16/FP16 and 2048 Int8 Flops per cycle. Some additional features for the P-Core lineup include FP16 support through the Intel AMX matrix engine, MVR DIMM support offering up to 8800 MT/s speeds, and AES-256 bit / 2048 encryption key support.
The Intel Xeon E-Core CPUs are based on the Intel 4 process node and use the Crestmont E-Core architecture which comes with a single-threaded core design, houses 4 MB of L2 cache per 4-core cluster, Enhanced AVX2 for AI & Vector operations (2x128), 64 KB L1i and 32 KB ECC L1d cache. The architecture is a 6-wide decode, 6-wide allocate and 8-wide instruction retire design with a 256 instruction out-of-order execution engine and 16 FP32 Flops per cycle.
Some of the newly added features to the Xeon 6700E E-Core CPU lineup include VNNI Int8 & BF16/FP16 (with faster convert) support and AES-256-bit / 2048 encryption key support.
Unlike AMD's Zen 5 and Zen 5C cores which share the same ISA, these two Intel architectures are very different from one another but Intel states that both Xeon P-Core and E-Core CPUs will have a singular and simplified software stack, sharing the same instruction set (extensions), OS & hyper-visor, applications and libraries.
Intel isn't necessarily sharing the individual SKU details at the moment but what they are sharing is information on the rest of the lineup which launch in Q1 2025. These SKUs will include the high-end Xeon 6900E "Sierra Forest" products with up to 288 cores along with the remaining Intel Xeon 6700P, 6500P, 6300P, and SOC products under the "Granite Rapids" lineup.
Intel Xeon 6 Platforms: LGA 7529 For High-End 1S/2S & LGA 4710 For Scalable 1S/8S Configs
With that out of the way, let's talk about the platforms. The Intel 6700 "Sierra Forest" & "Granite Rapids" CPUs will feature support on the LGA 4710 socket platform, internally referred to as the Birch Stream with the reference evaluation platform known as Beechnut City. This platform can be configured in 1S/2S (E-Core) and up to 4S/8S (P-Core) solutions, supporting up to 350W TDP per CPU, 8 memory channels, DDR5-6400/MCR-8000 MT/s support, up to 88 PCIe Gen 5.0 / CXL 2.0 lanes with certain 1S solutions offering up to 136 lanes and 4 UPI 2.0 links running at up to 24 GT/s speeds.
Then we have the higher-end Intel Xeon 6900 "Sierra Forest" and "Granite Rapids" CPUs which will feature support on the LGA 7529 socket platform (Also Birch Stream) with the reference platform known as Avenue City. This platform supports 1S/2S configurations with up to 500W TDP per CPU, 12 memory channels supporting DDR5-6400/MCR-8800 MT/s speeds, up to 96 PCIe Gen 5.0/CXL 2.0 lanes, and up to 6 UPI 2.0 links running at up to 24 GT/s speeds. Following is the maximum CPU config you get on each platform:
- Intel Xeon 6900P - LGA 7529 / 500W TDP Per CPU / 1S-2S Configs / Up To 128 Cores
- Intel Xeon 6900E - LGA 7529 / 500W TDP Per CPU / 1S-2S Configs / Up To 288 Cores
- Intel Xeon 6700P - LGA 4710 / 350W TDP Per CPU / 1S-8S Configs / Up To 86 Cores
- Intel Xeon 6700E - LGA 4710 / 330W TDP Per CPU / 1S-2S Configs / Up To 144 Cores
Last up, we have some performance numbers. Despite today's announcement mainly being centered around the launch of the Xeon 6700E "Sierra Forest" CPUs, Intel also shares that its Xeon 6900P "Granite Rapids" CPUs will offer 2x higher AI inference performance, 2.3x higher HPC and 2x average general compute uplifts versus the 5th Gen Xeon family (Emerald Rapids).
It looks like a very well-rounded lineup with 128 P-Cores tackling AMD's next-gen EPYC Turin CPUs with the same core count while Sierra Forest battles out with 128 & 192-core Bergamo/Turin-Dense CPUs with 144 and 288-core configurations. It is after a long time that Intel will see core parity with AMD's EPYC lineup and we hope that Intel can continue on this roadmap and make the data center market more competitive in the future.
Intel Xeon CPU Families (Preliminary):
| Family Branding | Diamond Rapids | Clearwater Forest | Granite Rapids | Sierra Forest | Emerald Rapids | Sapphire Rapids | Ice Lake-SP | Cooper Lake-SP | Cascade Lake-SP/AP | Skylake-SP |
|---|---|---|---|---|---|---|---|---|---|---|
| Process Node | TBD | Intel 18A | Intel 3 | Intel 3 | Intel 7 | Intel 7 | 10nm+ | 14nm++ | 14nm++ | 14nm+ |
| Platform Name | Intel Oak Stream | Intel Birch Stream | Intel Birch Stream | Intel Mountain Stream Intel Birch Stream | Intel Eagle Stream | Intel Eagle Stream | Intel Whitley | Intel Cedar Island | Intel Purley | Intel Purley |
| Core Architecture | Panther Cove-X | Darkmont | Redwood Cove | Sierra Glen | Raptor Cove | Golden Cove | Sunny Cove | Cascade Lake | Cascade Lake | Skylake |
| MCP (Multi-Chip Package) SKUs | Yes | Yes | Yes | Yes | Yes | Yes | No | No | Yes | No |
| Socket | LGA XXXX / 9324 | LGA 4710 / 7529 | LGA 4710 / 7529 | LGA 4710 / 7529 | LGA 4677 | LGA 4677 | LGA 4189 | LGA 4189 | LGA 3647 | LGA 3647 |
| Max Core Count | TBD | Up To 288 | Up To 128 | Up To 288 | Up To 64? | Up To 56 | Up To 40 | Up To 28 | Up To 28 | Up To 28 |
| Max Thread Count | TBD | Up To 288 | Up To 256 | Up To 288 | Up To 128 | Up To 112 | Up To 80 | Up To 56 | Up To 56 | Up To 56 |
| Max L3 Cache | TBD | TBD | 480 MB L3 | 108 MB L3 | 320 MB L3 | 105 MB L3 | 60 MB L3 | 38.5 MB L3 | 38.5 MB L3 | 38.5 MB L3 |
| Memory Support | Up To 16-Channel DDR5? | Up To 12-Channel DDR5-8000 | Up To 12-Channel DDR5-6400 MCR-8800 | Up To 12-Channel DDR5-6400 | Up To 8-Channel DDR5-5600 | Up To 8-Channel DDR5-4800 | Up To 8-Channel DDR4-3200 | Up To 6-Channel DDR4-3200 | DDR4-2933 6-Channel | DDR4-2666 6-Channel |
| PCIe Gen Support | PCIe 6.0? | PCIe 5.0 (96 Lanes) | PCIe 5.0 (136 Lanes) | PCIe 5.0 (88Lanes) | PCIe 5.0 (80 Lanes) | PCIe 5.0 (80 lanes) | PCIe 4.0 (64 Lanes) | PCIe 3.0 (48 Lanes) | PCIe 3.0 (48 Lanes) | PCIe 3.0 (48 Lanes) |
| TDP Range (PL1) | TBD | Up To 500W | Up To 500W | Up To 350W | Up To 350W | Up To 350W | 105-270W | 150W-250W | 165W-205W | 140W-205W |
| 3D Xpoint Optane DIMM | TBD | N/A | Donahue Pass | N/A | Crow Pass | Crow Pass | Barlow Pass | Barlow Pass | Apache Pass | N/A |
| Competition | AMD EPYC Venice | AMD EPYC Turin | AMD EPYC Turin | AMD EPYC Bergamo | AMD EPYC Genoa ~5nm | AMD EPYC Genoa ~5nm | AMD EPYC Milan 7nm+ | AMD EPYC Rome 7nm | AMD EPYC Rome 7nm | AMD EPYC Naples 14nm |
| Launch | 2025-2026 | 2026 | 2024 | 2024 | 2023 | 2022 | 2021 | 2020 | 2018 | 2017 |
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