Intel's crucial EMIB technology has achieved a phenomenal yield rate, showing its readiness for upcoming adoptions in AI datacenter chips.
Intel EMIB Is The Single Most Crucial Foundry Tech From Chipzilla, Which Will Set It As An Advanced Packaging Competitor to TSMC
We recently discussed how EMIB is being eyed by AI firms for their next-generation AI chips. The tech has one simple purpose: to provide a cost-effective and scalable alternative to TSMC's CoWoS technology.
The advanced packaging tech from Intel is set to be used by Google in its next-generation TPUs, and we have also cited NVIDIA using it for its next-gen Feynman chips. Jeff Pu, a research analyst at GF Securities Technology Research, has now shared some insights into EMIB's progress, and the initial impressions are looking really good.
As per Jeff, Intel's EMIB yields have reached 90%, which is great news for the company's Foundry business and shows why there's so much confidence surrounding Intel Foundry at the moment. Meta is also one name that has been highlighted as a customer for EMIB, though the plans revolve around a late-2028 CPU, so it will be some time before we get more information on that front.
In the meantime, Intel is not stopping at highlighting the advantages of its EMIB technologies. The chip maker has once again highlighted the benefits of EMIB (Embedded Multi-die Interconnect Bridge), which include: Improved Yields, Lower Power, Lower Cost, and making larger "Mixed-Node" systems practical.
In the new video, Intel has also shared an interesting insight for EMIB, stating that EMIB yields are comparable to FCBGA while offering higher interconnect density between dies. FCBGA or Flip Chip Ball Grid Array is another high-performance packaging technology that is used for various IPs such as CPUs, GPUs, and other controller dies. FCBGA chips are connected directly to the PCB substrate using solder bumps, while EMIB houses interconnects within the bridge that connect multiple dies together.
Key Differences of EMIB-M and EMIB-T
Currently, there are two key EMIB technologies: EMIB-M and EMIB-T. The EMIB-M bridge is designed for efficiency and features MIM capacitors in the silicon bridge that enhance power delivery and integrity by minimizing noise. Although slightly higher in costs versus Metal-Oxide-Metal capacitors, MIM or Metal-Insulator-Metal capacitors offer higher stability and lower leakages.
The building process of EMIB-M involves the creation of highly dense 3D structures through chiplets. The chiplets are connected via the EMIB-M bridge, which offers high-bandwidth interconnectivity. Power to the chiplets is routed around the bridge.
Embedded Multi-die Interconnect Bridge 2.5D.
- An efficient, cost-effective way to connect multiple complex die.
- 2.5D packaging for logic-logic and logic-high bandwidth memory (HBM).
- EMIB-M features MIM capacitors in the bridge. EMIB-T adds TSVs to the bridge.
- Silicon bridge embedded in package substrate for shoreline-to-shoreline connection.
- EMIB-T can ease the enablement of IP integration from other packaging designs.
- Simplified supply chain and assembly process.
- Production proven: In mass production since 2017 with Intel and external silicon.
This power routing is changed in EMIB-T, which offers scale-up density through the integration of TSVs. With EMIB-T, the power can be routed directly through the EMIB bridge rather than around the bridge, like in EMIB-M. EMIB-T is designed to fulfill the requirements of high-performance AI chips.
EMIB at Scale for the Hyperscaler Era
As of right now, EMIB-T offers chip scalability of >8x the reticle size in 120x120 packages, housing 12 HBM chips, 4 dense chiplets, and over 20 EMIB-T connections. By 2028, Intel plans to scale to >12x the reticle size in >120x180 packages housing over 24 HBM dies and over 38 EMIB-T bridges.
For comparison, TSMC is expected to reach 14x Reticle by 2028, incorporating up to 20 HBM packages. The company also has SoW (System of Wafer) packages for ultra-large advanced packaged chips, though those will come at a much higher cost versus CoWoS.
A key advantage for EMIB is that its IP and process node agnostic, so you can house multiple chips based on various IPs and various 3rd party or internal process nodes, making chips that are built for bandwidth, power integrity, and scale.
About the author: A Software Engineer by training and a PC enthusiast by passion, Hassan Mujtaba serves as Wccftech's Senior Editor for hardware section. With years of experience in the industry, he specializes in deep-dive technical analysis of next-generation CPU and GPU architectures, motherboards, and cooling solutions. His work involves not only breaking news on upcoming technologies but also extensive hands-on reviews and benchmarking.
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