Intel Emerald Rapids, 5th Gen Xeon CPU Family Specs Leaked – Up To 64 Cores, DDR5-5600, 80 Gen 5.0 Lanes, 125-350W SKUs

Details of Intel's 5th Gen Xeon Scalable CPU family, codenamed Emerald Rapids, have been leaked by YuuKi_AnS over on Twitter.

Intel's 5th Gen Emerald Rapids Xeon Scalable Family To Feature Up To 64 Cores & SKUs Ranging From 125-350W TDPs

According to the leak, Intel's Emerald Rapids-SP Xeon CPU family will be based upon a mature 'Intel 7' node. You can think of it as a 2nd Gen 'Intel 7' node which would lead to slightly higher efficiency. Emerald Rapids is expected to make use of the Raptor Cove core architecture which is an optimized variant of the Golden Cove core that will deliver 5-10% IPC improvement over Golden Cove cores. It will also pack up to 64 cores and 128 threads which is a small core bump over the 56 cores and 112 threads featured on Sapphire Rapids chips.

This will more or less match the existing EPYC Milan & Rome core counts but Genoa and Bergamo will be offering up to 50% & 2x core/thread count increase over Emerald Rapids and they will be available in full volume by 2023.

So talking about the platform details, the Eagle Stream ecosystem will allow support for 125-350W TDP SKUs on the Socket E (LGA 4677), enabling drop-in support from Sapphire Rapids-SP. The HPC and data center segment will have immense scalability options ranging from 1S, 2S, 4S, 8S and even more sockets (via xNC support) for increased compute and core densities. The chips will come with the latest accelerators including:

• Intel Data Streaming Accelerator
• Intel QuickAssist Technology
• Intel Dynamic Load Balancer
• Intel Advanced Matrix Extensions
• Intel In-Memory Analytics Accelerator

Besides that, the platform will enable support for faster DDR5-5600 (1DPC) and retain DDR5-4800 (2DPC). The 8-channel DDR5 memory platform will allow up to two DIMMS per channel for a total of 16 DIMMs per socket and each socket can support up to 24 Gb DRAM densities. There's also Crow Pass Persistent Memory support "Crystal Ridge 3.0" listed but with Optane canned, that no longer seems to be the case. There will be four UPI 2.0 links running at a higher width speed of x24 for up to 20 GT/s transfer rates.

As far as PCIe lanes are concerned, the Intel Emerald Rapids Xeon CPUs will feature up to 80 Gen 5 PCIe lanes per CPU in addition to PCIe 4.0 lanes from the North Bridge. The platform will support bifurcation of x16, x8, x4, and x2 (Gen 4) and will also support Shared Virtual Memory & Scalable IO Virtualization. The Emmitsburg PCH will offer 20 PCIe 3.0 lanes, 1G Ethernet for Manageability, and an x8 DMI connection rated at PCIe 3.0 speeds. For security, the platform will offer:

• Intel Trust Domain Extensions
• Intel SGX With Integrity
• TME-MK - 128 Keys
• Platform Firmware Resilience (PFR) with Peripheral Device Attestation
• Hardware Enforced Execution Controls
• Intel VT-Redirect Protection (Formerly HLAT)
• Intel Control-Flow Enforcement Technology (CET)
• VM Denial of Service Prevention

By the time Intel released Emerald Rapids-SP Xeon CPUs, AMD will already have released its Zen 4-powered EPYC Genoa & Bergamo chips so the Xeon lineup may end up being too little & too late with only Intel's advanced instruction sets backing them up in niche workloads. A good thing for Emerald Rapids would be that it will remain compatible with the Eagle Stream platform (LGA 4677).

Intel Xeon CPU Families (Preliminary):

Family Branding	Coral Rapids	Diamond Rapids	Clearwater Forest	Granite Rapids	Sierra Forest	Emerald Rapids	Sapphire Rapids	Ice Lake-SP	Cooper Lake-SP	Cascade Lake-SP/AP	Skylake-SP
Process Node	Intel 14A?	Intel 18A-P	Intel 18A	Intel 3	Intel 3	Intel 7	Intel 7	10nm+	14nm++	14nm++	14nm+
Platform Name	TBD	Intel Oak Stream	Intel Birch Stream	Intel Birch Stream	Intel Mountain Stream Intel Birch Stream	Intel Eagle Stream	Intel Eagle Stream	Intel Whitley	Intel Cedar Island	Intel Purley	Intel Purley
Core Architecture	TBD	Panther Cove-X	Darkmont	Redwood Cove	Sierra Glen	Raptor Cove	Golden Cove	Sunny Cove	Cascade Lake	Cascade Lake	Skylake
MCP (Multi-Chip Package) SKUs	Yes	Yes	Yes	Yes	Yes	Yes	Yes	No	No	Yes	No
Socket	TBD	LGA XXXX / 9324	LGA 4710 / 7529	LGA 4710 / 7529	LGA 4710 / 7529	LGA 4677	LGA 4677	LGA 4189	LGA 4189	LGA 3647	LGA 3647
Max Core Count	TBD	Up To 192 P-Cores	Up To 288	Up To 128	Up To 288	Up To 64?	Up To 56	Up To 40	Up To 28	Up To 28	Up To 28
Max Thread Count	TBD	Up To 192	Up To 288	Up To 256	Up To 288	Up To 128	Up To 112	Up To 80	Up To 56	Up To 56	Up To 56
Max L3 Cache	TBD	TBD	TBD	480 MB L3	108 MB L3	320 MB L3	105 MB L3	60 MB L3	38.5 MB L3	38.5 MB L3	38.5 MB L3
Memory Support	TBD	Up To 16-Channel DDR5-9000+	Up To 12-Channel DDR5-8000	Up To 12-Channel DDR5-6400 MCR-8800	Up To 12-Channel DDR5-6400	Up To 8-Channel DDR5-5600	Up To 8-Channel DDR5-4800	Up To 8-Channel DDR4-3200	Up To 6-Channel DDR4-3200	DDR4-2933 6-Channel	DDR4-2666 6-Channel
PCIe Gen Support	PCIe 6.0	PCIe 6.0	PCIe 5.0 (96 Lanes)	PCIe 5.0 (136 Lanes)	PCIe 5.0 (88Lanes)	PCIe 5.0 (80 Lanes)	PCIe 5.0 (80 lanes)	PCIe 4.0 (64 Lanes)	PCIe 3.0 (48 Lanes)	PCIe 3.0 (48 Lanes)	PCIe 3.0 (48 Lanes)
TDP Range (PL1)	TBD	TBD	Up To 500W	Up To 500W	Up To 350W	Up To 350W	Up To 350W	105-270W	150W-250W	165W-205W	140W-205W
3D Xpoint Optane DIMM	TBD	TBD	N/A	Donahue Pass	N/A	Crow Pass	Crow Pass	Barlow Pass	Barlow Pass	Apache Pass	N/A
Competition	TBD	AMD EPYC Venice	AMD EPYC Turin	AMD EPYC Turin	AMD EPYC Bergamo	AMD EPYC Genoa ~5nm	AMD EPYC Genoa ~5nm	AMD EPYC Milan 7nm+	AMD EPYC Rome 7nm	AMD EPYC Rome 7nm	AMD EPYC Naples 14nm
Launch	2028-2029	2027	2026	2024	2024	2023	2022	2021	2020	2018	2017

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