G.Skill Now Offering New Extreme Low-Latency DDR5-5600 CL28 Memory Kits


G.Skill has expanded its DDR5 portfolio with a new 'Extreme Low-Latency' spec configured at DDR5-5600 with CL28 timings.

G.Skill Offers New 'DDR5-5600 CL28' Memory Spec As A New Extreme Low-Latency Kit

Currently, G.Skill was offering its Low-Latency memory kits in the DDR5-5200 spec with timings at 28-34-34-83. The new spec is configured at DDR5-5600 with timings rated at 28-34-34-89. The new specs will come in both 16 GB and 32 GB modules and will be available across the Trident Z5, Z5 RGB, and the Ripjaws S5 flavors. You can expect similar functionality and overclocking capabilities from the new memory spec too.

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Press Release: G.SKILL International Enterprise Co., Ltd., the world’s leading manufacturer of extreme performance memory and gaming peripherals, is excited to announce an extremely low-latency memory kit specification at DDR5-5600 CL28 in 64GB (32GBx2) and 32GB (16GBx2) kit capacities, under the Trident Z5 RGB, Trident Z5, and Ripjaws S5 series and designed for the latest 12th Gen Intel® Core™ desktop processors and Intel® Z690 chipset motherboards.

Breaking the Sub-30 Latency Barrier on DDR5

With a focus on breaking the limits of low latency with DDR5 memory, G.SKILL is releasing an extremely low-latency sub-30 timing memory specification at 5600 CL28-34-34-89. Setting a new bar for low-latency timing performance, this memory specification with CL28 marks a new era of high-end memory.

See the DDR5-5600 CL28 64GB (32GBx2) memory kit validated with the Intel® Core™ i7-12700K processor and ASUS ROG Maximus Z690 Hero motherboard in the screenshot below:

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Availability & Specifications

The DDR5-5600 CL28 memory specification in 64GB (32GBx2) and 32GB (16GBx2) kit capacities will be available under the Trident Z5 RGB, Trident Z5, and Ripjaws S5 series in late May 2022 via G.SKILL worldwide distribution partners. Prices aren't detailed yet but we will know by the end of this month. For detailed specifications, please refer to the table below: