The popular hardware testing utility, AIDA64, has added and improved support for Zen ‘Summit Ridge’ and Intel ‘Kaby Lake’ processors. While developers usually have free control of when to introduce these updates, they are usually backed by real documentation such as Machine IDs. It looks like AMD’s anxiously anticipated Zen processor is on track. It also means that the A0 engineering samples of said processors will be rolling out to select testers in the coming months.
Intel Kaby Lake and AMD Zen 'Summit Ridge' processors show up in AIDA64 changelog
The change-log for the latest version of AIDA64 (AIDA64 Extreme Edition v5.70.3800) was recently updated and contains more than one interesting entry. Developers of hardware testing tools are among the first to receive early documentation and A0 engineering samples of upcoming processors and are a good point of information for the progress of a particular product. In this case, it looks like things are going well on track (according to the information provided to these developers anyways) for AMD's upcoming Summit Ridge platform and Intel's Kaby Lake.
The Summit Ridge platform is the mainstream desktop platform of Zen processors having 8 cores a pop. Note that we are talking about full fledged SMT cores here and not the older styled CMT-based cores favored in the older FX processors. The socket stated on the slides was FM3 (which is now known as AM4). The new processors are supposed to increase IPC gains by 40% over the last generation and should, hopefully, see the compute side of AMD become competitive again. Not to mention that pretty much everything (financially speaking), for AMD, depends on Zen’s performance.
We had previously heard that AMD will be making a plethora of changes including changing to SMT and adopting a single FPU per core design – both things which will put it on track to be a competitive force with Intel processors. That’s not it either, Zen will be using a scheduling model that is similar to Intel’s and it will use specific hardware and simulation to define any needed scheduling or NUMA changes. It will also be ISA compatible with Haswell/Broadwell style of compute. It will bring various compiler optimizations, including GCC with target of SPECint v6 based score at common compiler settings. Bench-marking and performance compiler LLVM targets SPECint v6 rate score at performance compiler settings. Each Zen core will have access to 512KB of L2 cache and 4 Zen cores will share 8MB of L3 cache.
As far as Intel's Kaby Lake is concerned - that particular platform is fairly straightforward. Intel has finally let go of the tick-tock cadence that it had been using for so long. The new cadence, dubbed "Process, Architecture, Optimization" (sounds much less catchy) relies on at least one more iteration at the same die shrink for ironing out the kinks in the micro-architecture completely.
In this case, Broadwell is the "Process", Skylake is "Architecture" and Kaby Lake will be "Optimization"; Intel's 14nm process finally perfected. Intel plans to make several IPC and architectural improvements in Kaby Lake including a much more powerful iGPU configuration. They are also expected to go face to face against AMD's 8 Core zen processors so it is expected that Intel will be able to bring IPC gains of 10% (over Skylake) while staying within the 95W TDP limit and LGA 1151 on the Z270 chipset.
|WCCFTech||AMD Summit Ridge||Intel Kaby Lake|
|Product Naming||AMD RYZEN||Intel Core 7000 Series|
|Product Segment||Mainstream Desktop PCs||Mainstream Desktop PCs|
|Product Architecture||x86 Zen (+40% IPC compared to Excavator)||7th Gen Kaby Lake (Same IPC as Skylake)|
|Max CPU Cores/Threads||8/16||4/8|
|GPU Architecture||N/A||Intel HD 600 Series|
|TDP||Up to 95W||Up to 95W|
|Launch||February - March 2017||January 2017|