AMD's Krackan Point APUs which are designed as a mainstream Ryzen AI option are expected to feature faster LPDDR5X memory support.
AMD's Krackan Point "Ryzen AI" APUs Will Target Mainstream Platforms Aggressively: Zen5 Architecture, RDNA 3.5 & High-Speed Memory Support
AMD has been looking to aggressively expand its portfolio of mobile CPUs since after Phoenix and Hawk Point; the firm is expected to introduce two different lineups following the Ryzen AI 300 "Strix" series, Strix Halo & Krackan Point "Ryzen AI" APUs.
In terms of specifications, the AMD Krackan Point "Ryzen AI" APUs are set to feature a monolithic design comprising Zen 5 and Zen 5c cores for power-efficient operation, and for the iGPU onboard, the architecture will come with RDNA 3.5 graphics.
New information disclosed by Lenovo China's Product Manager (via Weibo) reveals that the AMD Krackan Point "RyzenAI" APUs will support up to LPDDR5x-8000 memory solutions, higher than the previously claimed 7,500 MT/s. LPDDR5X-8000 will be a nice addition, especially since Intel's Lunar Lake CPUs will feature support for up to LPDDR5-8533 memory. AMD plans to integrate top-notch specifications with its next-gen APUs, and the Krackan Point will indeed bring massive generational uplifts from the Hawk Point series for mainstream users.
AMD Ryzen AI HX Krackan Point Expected Features:
- Zen 5 Monolithic Design
- Up To 8 Cores (4x Zen 5 + 4x Zen 5C)
- 16 MB of Shared L3 cache
- 8 RDNA 3.5 Compute Units
- LPDDR5X-8000 Support
- XDNA 2 Engine Integrated
- Up To 50 AI TOPS
- 1H 2025 Launch
- FP8 Platform (15W-45W)
AMD's upcoming APUs are set to revamp the mobile segment through boosted specifications, especially in the domain of AI PCs and handhelds. Given that Team Red plans to release the Krackan Point lineup alongside the Strix Halo series, the upcoming mobile SoCs are set to be well-decorated, likely targeting every segment of the market. In terms of release dates, both Strix Halo and Krackan aren't going to appear before 2025, which shows that the best launch window will be at CES 2025.
AMD Ryzen Mobility CPUs:
| CPU Family Name | AMD Sound Wave? | AMD Bald Eagle Point | AMD Krackan Point | AMD Fire Range | AMD Strix Point Halo | AMD Strix Point | AMD Hawk Point | AMD Dragon Range | AMD Phoenix | AMD Rembrandt | AMD Cezanne | AMD Renoir | AMD Picasso | AMD Raven Ridge |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Family Branding | TBD | Ryzen AI 400 | TBD | TBD | Ryzen AI 300 | Ryzen AI 300 | AMD Ryzen 8040 (H/U-Series) | AMD Ryzen 7045 (HX-Series) | AMD Ryzen 7040 (H/U-Series) | AMD Ryzen 6000 AMD Ryzen 7035 | AMD Ryzen 5000 (H/U-Series) | AMD Ryzen 4000 (H/U-Series) | AMD Ryzen 3000 (H/U-Series) | AMD Ryzen 2000 (H/U-Series) |
| Process Node | TBD | 4nm | 4nm | 5nm | 4nm | 4nm | 4nm | 5nm | 4nm | 6nm | 7nm | 7nm | 12nm | 14nm |
| CPU Core Architecture | Zen 6? | Zen 5 + Zen 5C | Zen 5 | Zen 5 | Zen 5 + Zen 5C | Zen 5 + Zen 5C | Zen 4 + Zen 4C | Zen 4 | Zen 4 | Zen 3+ | Zen 3 | Zen 2 | Zen + | Zen 1 |
| CPU Cores/Threads (Max) | TBD | 12/24 | 8/16 | 16/32 | 16/32 | 12/24 | 8/16 | 16/32 | 8/16 | 8/16 | 8/16 | 8/16 | 4/8 | 4/8 |
| L2 Cache (Max) | TBD | 12 MB | TBD | TBD | 24 MB | 12 MB | 4 MB | 16 MB | 4 MB | 4 MB | 4 MB | 4 MB | 2 MB | 2 MB |
| L3 Cache (Max) | TBD | 24 MB + 16 MB SLC | 32 MB | TBD | 64 MB + 32 MB SLC | 24 MB | 16 MB | 32 MB | 16 MB | 16 MB | 16 MB | 8 MB | 4 MB | 4 MB |
| Max CPU Clocks | TBD | TBD | TBD | TBD | TBD | 5.1 GHz | TBD | 5.4 GHz | 5.2 GHz | 5.0 GHz (Ryzen 9 6980HX) | 4.80 GHz (Ryzen 9 5980HX) | 4.3 GHz (Ryzen 9 4900HS) | 4.0 GHz (Ryzen 7 3750H) | 3.8 GHz (Ryzen 7 2800H) |
| GPU Core Architecture | RDNA 3+ iGPU | RDNA 3.5 4nm iGPU | RDNA 3+ 4nm iGPU | RDNA 3+ 4nm iGPU | RDNA 3.5 4nm iGPU | RDNA 3.5 4nm iGPU | RDNA 3 4nm iGPU | RDNA 2 6nm iGPU | RDNA 3 4nm iGPU | RDNA 2 6nm iGPU | Vega Enhanced 7nm | Vega Enhanced 7nm | Vega 14nm | Vega 14nm |
| Max GPU Cores | TBD | 16 CUs (1024 Cores) | 12 CUs (786 cores) | 2 CUs (128 cores) | 40 CUs (2560 Cores) | 16 CUs (1024 Cores) | 12 CUs (786 cores) | 2 CUs (128 cores) | 12 CUs (786 cores) | 12 CUs (786 cores) | 8 CUs (512 cores) | 8 CUs (512 cores) | 10 CUs (640 Cores) | 11 CUs (704 cores) |
| Max GPU Clocks | TBD | 2900 MHz | TBD | TBD | TBD | 2900 MHz | 2800 MHz | 2200 MHz | 2800 MHz | 2400 MHz | 2100 MHz | 1750 MHz | 1400 MHz | 1300 MHz |
| TDP (cTDP Down/Up) | TBD | 15W-45W (65W cTDP) | 15W-45W (65W cTDP) | 55W-75W (65W cTDP) | 55W-125W | 15W-45W (65W cTDP) | 15W-45W (65W cTDP) | 55W-75W (65W cTDP) | 15W-45W (65W cTDP) | 15W-55W (65W cTDP) | 15W -54W(54W cTDP) | 15W-45W (65W cTDP) | 12-35W (35W cTDP) | 35W-45W (65W cTDP) |
| Launch | 2026? | 2025? | 2025? | 2H 2024? | 2H 2024? | 2H 2024 | Q1 2024 | Q1 2023 | Q2 2023 | Q1 2022 | Q1 2021 | Q2 2020 | Q1 2019 | Q4 2018 |
About the author: Muhammad Zuhair is a hardware and technology reporter for Wccftech, specializing in the semiconductor industry and the complex interplay between technology, manufacturing, and geopolitics. His coverage focuses on the corporate strategies and technological roadmaps of industry giants like TSMC, NVIDIA, Samsung, and Intel. Zuhair's expertise lies in deconstructing complex topics such as fabrication nodes (e.g., 2nm process), the economic impact of policies like the CHIPS Act, and the strategic development of AI infrastructure from NVIDIA, AMD and Intel.
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