Intel’s Xeon Phi 14nm ‘Knights Landing’ Co-Processors Detailed – OmniPath Architecture 100 Series and 16GB HMC on a 2.5D Interposer

Usman Pirzada
Posted Jul 15, 2015
Share Tweet Submit

Intel has already revealed most of the big points of the upcoming Knights Landing platform earlier this year. However, Intel will be volunteering more information about the OmniPath Architecture used in its Xeon Phi products at the International Supercomputing Conference 2015 (ISC 2015). The Xeon Phi family of products is Intel’s (apparently successful) foray into the GPGPU sector or the world of extensively parallel data processing. The Co-Processors will be deploying commercially later this year.

Intel talks about Knight’s Landing Omni Path 100 Series Architecture

Knight’s Landing was built on the 14nm Process and uses modified silvermont cores (x86 ofcourse). It is also one of the first mass produced components developed for this market segment that features stacked DRAM (short of AMD’s Fury lineup, which doesn’t really count here). Since the GPU form factor is usually limited (to heck) by the PCI-E lane, an alternative CPU form factor is also provided which gives super-low latency and almost no bottlenecks. The on-packed stacked DRAM will come in a whooping 16 GB while there are connections for additional DDR4 2400Mhz memory. Keep in mind that we are talking about a socket-able, packaged processor here, not just a GPU sized product.

The HMC will not actually be placed or stacked upon the die. Using the 2.5 D stacking that should now be pretty familiar for our readers, Intel will actually be surrounding the Xeon Phi die using a Micron-Intel custom made, super-high bandwidth, parallel path interface that will make the HMC appear as if its on the die. Infact it will act more or less like an L3 cache worth 16GB. The Hybrid Memory Cube used in the Knights Landing Xeon Phi package will feature upto 2000 TSVs and an ASIC at the base of the HMC to manage the DRAM package. It promises more than 5 times the bandwidth of DDR4 RAM and more than 15 times the bandwidth of DDR3 Ram. Because Intel is using a customized Micron 16GB HMC solution (they already have 2GB and 4GB variants) and a customized interface the bandwidth will be 500GB/s.


The Knight’s Landing ‘Xeon Phi’ Co Processor will have upto 72 cores, something Intel has once again confirmed. This is actually pretty decent news, because for once Intel seems to be having good luck when it comes to Yield. Its predecessor were only able to chug out Knight’s Corner with around 61 cores. While I am sure there will be variants with cut down cores, there will also be variants with the full 72 cores.  A point I might add is the number of cores can be misleading. These are cores based on the Silvermont architecture and nowhere near as powerful as the the cores deployed in the mainstream desktop market. Still, they will be able to pack a punch of upto 3 TeraFlops which is efficient enough given the electric footprint.

And ofcourse, the biggest advantage is that this is a co-processor. Unlike a GPU running GPGPU applications, which requires a CPU to direct its workload, a Co-Processor requires no such direction and is completely independent. The downside is that it needs more customized software to effectively utilize it. The Omni Path 100 Series as Intel now calls it is an attempt at vertical integration and expanding into the market occupied by Infiniband. As you can clearly tell from the PR material, Intel is showcasing its Omni-Path interconnect as a significantly superior alternative to InfiniBand. Each Knight’s Landing product will have 2 ports for the Omni-Path connectors. The exact release date of this product is not known but it is thought to be sometime later in this year.

Share Tweet Submit