X-Silicon Unveils Low-Power C-GPU Architecture Combined With RISC-V CPU, Open Standard & Supports Vulkan

Apr 4, 2024 at 06:45pm EDT

X-Silicon, a firm known for silicon IP solutions, has unveiled a new "C-GPU architecture," which combined with a RISC-V CPU focuses on low-power & efficient performance solutions.

X-Silicon's C-GPU Architecture Aims At Making The Low-Power Compute Segment More Diverse & Effective: RISC-V CPU, Open-Standard & Vulkan Support

Jon Peddie Research reports that X-Silicon has decided to have their take on the "efficient computing" markets through a new GPU architecture, which is planned to utilize GPU acceleration with RISC-V Vector CPUs, allowing a much more effective combination of architectures, ultimately guaranteeing faster and low-power performance. X-Silicon's C-GPU platform is intended to dominate in segments such as the automotive and embedded computing markets, where the power-to-performance ratios are pretty strict for manufacturers, which is why such efficient solutions are preferred.

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Image Source: X-Silicon

Now, in terms of how X-Silicon intends to make its C-GPU architecture the way they are advertising, the firm plans on leveraging the RISC-V platform present on CPUs by "open-sourcing of its unified RISC-V vector CPU with GPU ISA."

C-GPU features a patented NanoTile architecture, which combines real-time processing with graphical rendering to efficiently manage compute resources. Moreover, NanoTile is said to contribute significantly to AI/ML applications, due to the optimized data flow, potentially creating it a viable alternative to the modern-day NPU offerings, at least on paper.

Image Source: X-Silicon

X-Silicon believes that its C-GPU architecture will receive massive interest going into the future, and through the NanoTile and RISC-V platforms, the company plans on creating a compelling package for manufacturers, ultimately increasing its adoption moving into the future. The company plans on making SDKs accessible to exclusive partners in the upcoming months, but the firm hasn't revealed when we could see the architecture hit the markets, but a ballpark guess would be within the next year or two.

News Source: JPR

About the author: Muhammad Zuhair is a hardware and technology reporter for Wccftech, specializing in the semiconductor industry and the complex interplay between technology, manufacturing, and geopolitics. His coverage focuses on the corporate strategies and technological roadmaps of industry giants like TSMC, NVIDIA, Samsung, and Intel. Zuhair's expertise lies in deconstructing complex topics such as fabrication nodes (e.g., 2nm process), the economic impact of policies like the CHIPS Act, and the strategic development of AI infrastructure from NVIDIA, AMD and Intel.

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