TSMC Maps Out A13 “1.3nm” & A12 “1.2nm” Nodes For 2029, Sidesteps ASML’s Priciest EUV Tools For Now

TSMC has presented its latest technology roadmap through 2029, bringing advanced processes such as A13 and A12 by 2029.

TSMC Reluctant To Use ASML's Advanced EUV Machines Due To Cost Constraints, Focuses On Die Shrinks For 2029 With A13 & A12

During TSMC's 2026 North American Technology Symposium, the company presented its latest roadmap, which includes some major updates. These new processes will offer a further refinement, such as savings in area size, and the utilization of new technologies.

Starting with the roadmap itself, following the mass production of its N2 process technology, which is expected in the first products this year, TSMC will continue to develop advanced process nodes such as N2P/N3A, which are planned for 2026, N2X/A16 for 2027, A14/N2U for 2028, and A13/A12 for 2029. At the same time as TSMC works on these high-end processes, the company will also offer mainstream-optimized technologies such as N3C, which is expected for 2026, and N2U, which covers both high-end and mainstream applications.

TSMC A13 (1.3nm) Process Node

Today, TSMC previewed its A13 (1.3nm) process technology, which is a shrink of the A14 node. The node offers 6% area savings versus A14. With A13, TSMC promises more compact and efficient designs for its customers. A13 will be a prime node for HPC, AI, and mobile applications. In terms of improvements besides the area shrink, the A13 node also offers full backward compatibility with A14. The node will enter production phase by 2029, a year after A14 (1.4nm).

TSMC A12(1.2nm) Process Node

Around the same time, TSMC also plans to launch its A12 (1.2nm) node, which is a further enhancement of the A14 node. The A12 node leverages TSMC's Super Power Rail technology for backside power delivery, & is scheduled for production by 2029.

TSMC N2U (2nm) Process Node

For its N2 (2nm) platform, TSMC will introduce a new node called N2U, which offers speed gains of 2-4% or power reduction of 8-10% at the same performance. The node will offer a 1.02-1.03x increase in logic density versus N2P, and is being primed as a balanced option for AI, HPC, and mobile applications. Since it builds upon the N2 platform, it will be a much more mature process, offering stronger yields, and will be ready for production in 2028.

Besides these, TSMC also unveiled a host of advanced packaging solutions that it is working on, such as 3D Silicon Stacking and 3D Fabric.

It's highly popular CoWoS (Chip-on-Wafer-on-Silicon) packaging technology will now be able to produce 5.5-reticle-sized products, and the company is aiming for even bigger flavors. A 14-reticle size CoWoS die solution, which can integrate 10 compute dies and 20 HBM stacks, is already slated for production by 2028. The company will further expand its capabilities in 2029 with a 40-reticle size SoW-X technology.

OpenAI recently disclosed its patent, in which it leverages embedded interconnect bridges to create massive dies, bypassing the current limits imposed by CoWoS and 2.5D packaging technologies. So, it'll be interesting to see how things evolve in terms of packaging in the future.

• TSMC is also offering its TSMC-SoIC 3D chip stacking technology on its most advanced technology platform, with A14-to-A14 SoIC set to be available for production in 2029. It will provide 1.8X higher die-to-die I/O density compared with N2-on-N2 SoIC, supporting a higher bandwidth of data transfer between
• TSMC’s Compact Universal Photonic Engine (TSMC-COUPE) is set to reach a key milestone with a true co-packaged optics solution using COUPE on substrate beginning production in 2026. By integrating the COUPE optical engine directly inside the package, TSMC achieves 2X power efficiency and 10X latency reduction versus a pluggable version on the circuit board. The technology is featured in a 200Gbps micro-ring modulator, a highly compact and energy-efficient solution to move data between racks in data centers.

TSMC also highlighted that it will refrain from using ASML's advanced EUV machines through 2029. The reason for that is not because they aren't of much need; they are the machines that will help create next-generation technologies.

"Whenever we see High-NA will provide meaningful, measurable benefit, we will do it. With A14, the enhancement I talked about earlier is very substantial without using High-NA. So, our technology team continues to find a way to extend the life of current EUV while harvesting the scaling benefit."

Kevin Zhang - TSMC Senior Vice President

But as of right now, as companies focus their investments towards the creation of newer fabs to meet the booming AI demand, the cost of ASML's advanced lithography equipment is just way too much. So this pricey investment in next-gen technologies will have to wait, but TSMC will continue to use existing EUV machines to produce optimized and efficient versions of its upcoming nodes, such as A13 and A12, as highlighted above.

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