TSMC’s A16 ‘1.6nm’ Node Promises 10% Speed Boost or 20% Power Cut Over 2nm, With Backside Power Hitting Production by Q4 2026

TSMC's next-generation A16 or 1.6nm process tech will be the start of its "Angstrom Era" journey, delivering improved performance/power profiles versus 2nm.

Angstrom Era For TSMC - A16 Process Tech Offers Better Performance/Power Profiles Versus 2nm While Adding Backside Power

At the 2026 VLSI symposium, TSMC will be presenting its A16 process node technology. A16 is part of TSMC's Angstrom era family of nodes, which includes A14 and the recently announced A13 & A12.

In a preview provided by VLSI of the upcoming paper titled "T1.5", TSMC restates the performance/power profile advantages. One of the biggest features for A16 will be the addition of Backside Power Delivery "BSPDN), which TSMC refers to as Super Power Rail (SPR). A16 will leverage an optimized Nanosheet Transistor technology, first being used by its N2 (2nm) tech, which is being deployed later this year in chips such as AMD's EPYC Venice.

Intel has already leveraged Backside Power Delivery for its 18A process technology, powering the Panther Lake CPUs. As for performance, TSMC A16 will offer an 8-10% speed up versus N2P at the same core area. Or the process technology can offer a 20% reduction in power versus N2. The new process tech also adds up to 8-10% logic density and SRAM density.

2 of 9

TSMC A16 technology integrates leading nanosheet transistors with innovative Super Power Rail (SPR) solutions, bringing greatly improved logic density and performance.

SPR improves logic density and performance by dedicating front-side routing resources to signals. It also significantly reduces IR drop, improving power delivery efficiency. Most importantly, our novel backside contact scheme preserves gate density, layout footprint, and device width flexibility as traditional front-side power delivery to achieve an industry-first best density and best performance.

Compared to TSMC’s N2P process, A16 will provide an 8-10% speed improvement at the same Vdd (positive power supply voltage), a 15-20% power reduction at the same speed, and up to 1.10X chip density, making it best suited for high-performance computing (HPC) products with complex signal routes and dense power delivery networks.

TSMC

According to the latest details, TSMC A16 is planned for mass production in Q4 2026, but that doesn't mean that we will see chips using the process by that time. Actual products based on A16 are planned around a 2027-2028 timeframe. The A16 and A14 nodes will play a key role in setting TSMC for the next generation of processes, such as A13 and A12.

TSMC A13 (1.3nm) Process Node

The TSMC A13 (1.3nm) process technology is a shrink of the A14 node. The node offers 6% area savings versus A14. With A13, TSMC promises more compact and efficient designs for its customers. A13 will be a prime node for HPC, AI, and mobile applications. In terms of improvements besides the area shrink, the A13 node also offers full backward compatibility with A14. The node will enter production phase by 2029, a year after A14 (1.4nm).

TSMC A12(1.2nm) Process Node

Around the same time, TSMC also plans to launch its A12 (1.2nm) node, which is a further enhancement of the A14 node. The A12 node leverages TSMC's Super Power Rail technology for backside power delivery, & is scheduled for production by 2029.

These process technologies are crucial for TSMC as it amps up production capacity at its various fabs, while adding new factories. As the semiconductor maker continues to face heightened constraints due to AI demand, the space is being opened up for competitors such as Intel to fill in the gaps, and Intel is doing so in a big way with its upcoming advanced packaging technologies, such as EMIB, and external customer-focused nodes such as 18A-P and 14A.

News Source: Dr. Ian Cutress

Follow Wccftech on Google to get more of our news coverage in your feeds.