Rambus has announced its LPDDR5X SOCAMM2 memory chipset, a vital component to enable the next-gen compact memory for AI datacenters.
SOCAMM2 Lays The Key Foundation of Next-Gen AI Datacenters As Rambus Gears Up Its LPDDR5X-Based Chipset For Launch
Press Release: Rambus, a premier chip and silicon IP provider making data faster and safer, today announced a SOCAMM2 (Small Outline Compression Attached Memory Module) chipset designed to enable low-power, high-performance LPDDR5X-based memory modules for AI server platforms.
The SOCAMM2 chipset represents the first step in a broader Rambus roadmap of LPDDR-based server module solutions, reflecting the company’s ongoing collaboration with industry partners to support new memory architectures optimized for evolving workloads in AI data center infrastructure. This new product family extends the comprehensive Rambus offering of complete memory interface chipsets for all JEDEC-standard DDR5 and LPDDR5 memory modules.
The rapid diversification and expansion of data center workloads driven by AI is reshaping system requirements, heightening the need for purpose-built solutions that optimize for power, efficiency, form factor, and memory scalability. SOCAMM2 memory modules, based on LPDDR technology, are emerging as an innovative architectural approach to address these challenges by delivering high performance with lower power consumption in a modular, serviceable, board-area-efficient form factor.
The Rambus SOCAMM2 chipset is designed to support this transition by providing the critical control, telemetry, and power delivery functions required by JEDEC-standard SOCAMM2 memory modules in demanding AI server environments.
“SOCAMM2 represents a key step toward delivering efficient, scalable, CPU-connected memory designed for the next wave of AI servers,” said Praveen Vaidyanathan, vice president and general manager of Cloud Memory Products at Micron. “With AI pushing the boundaries of compute performance and power budgets, the industry needs a robust ecosystem around LPDDR-class server memory. We welcome Rambus’ commitment to SOCAMM2 with an integrated chipset offering that supports the evolution of future AI system designs.”
“As AI workloads continue to challenge data center power, bandwidth, and density limits, memory architectures like SOCAMM2 represent an important evolution in how systems balance performance with efficiency,” said Soo Kyoum Kim, associate VP, memory semiconductors at IDC. “Contributions from ecosystem members such as Rambus are critical to enabling LPDDR-based memory to permeate in AI servers.”
SOCAMM2 replaces soldered LPDDR memory with detachable, upgradable modules that combine LPDDR efficiency with server-class serviceability in the data center. The Rambus LPDDR5X SOCAMM2 chipset supports reliable, power-efficient operation of LPDDR-based server memory modules at up to 9.6 Gb/s and includes:
- 12-amp (A) and 3A voltage regulators for localized, efficient power conversion.
- SPD Hub for module identification, configuration, and telemetry;
About the author: A Software Engineer by training and a PC enthusiast by passion, Hassan Mujtaba serves as Wccftech's Senior Editor for hardware section. With years of experience in the industry, he specializes in deep-dive technical analysis of next-generation CPU and GPU architectures, motherboards, and cooling solutions. His work involves not only breaking news on upcoming technologies but also extensive hands-on reviews and benchmarking.
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