JEDEC Relaxes HBM4 Memory Thickness on Request of Major Manufacturers, Enables 16-Hi Stacks Within Existing Bonding Tech

Mar 13, 2024 at 07:00am EDT
Samsung & SK hynix Eye 1c DRAM As The Choice For HBM4 Memory, TSMC Preps HBM4 Base Dies On 12nm & 5nm 1

JEDEC has reportedly provided relaxation for HBM4 memory participants, potentially allowing a more efficient development for 16-Hi designs.

JEDEC Eases HBM4 Thickness Thresholds For Manufacturers Including Samsung, SK Hynix & Micron, Removing The Need For Hybrid Bonding Tech For 16-Hi Stacks

HBM4 is the next big thing in the memory segment, with every firm involved in developing the memory type most effectively since it would ultimately set the course for success in the next-gen markets.

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To aid manufacturers, ZDNet Korea reports that JEDEC has decided to reduce the package thickness of HBM4 to 775 micrometers for both 12-layer and 16-layer HBM4 stacks, amid the complexities involved with a higher thickness level, along with the highly anticipated demand associated with the process.

Moreover, manufacturers were previously said to employ hybrid bonding with the process, a newer packaging technology, to reduce package thickness since it uses direct bonding with the onboard chip and wafer.

However, since HBM4 memory will be a new technology, it is expected that employing hybrid bonding will result in an overall bump in pricing, which means that next-gen products will be much more pricey, but the use of hybrid bonding isn't certain yet, as HBM manufacturers would probably leverage the "relaxation" made by JEDEC.

Regarding when we could see the debut of HBM4-based products, SK hynix has plans to mass-produce it by 2026, with initial samples expected to feature up to 36 GB capacities per stack. HBM4 is known to revolutionize the AI markets regarding computing performance since the memory type will employ "revolutionary" onboard die configurations by combining logic and semiconductors into a single package. Because TSMC and SK hynix have recently created an alliance, HBM and semiconductor markets are expected to proceed in a collaborative environment.

News Source: ZDNet Korea

About the author: Muhammad Zuhair is a hardware and technology reporter for Wccftech, specializing in the semiconductor industry and the complex interplay between technology, manufacturing, and geopolitics. His coverage focuses on the corporate strategies and technological roadmaps of industry giants like TSMC, NVIDIA, Samsung, and Intel. Zuhair's expertise lies in deconstructing complex topics such as fabrication nodes (e.g., 2nm process), the economic impact of policies like the CHIPS Act, and the strategic development of AI infrastructure from NVIDIA, AMD and Intel.

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