Intel's Nova Lake-S Desktop CPUs will reportedly include at least four models with bLLC cache in dual and single compute tile flavors.
Intel Nova Lake-S "Core Ultra 400" Desktop CPU Rumors: Dual Compute Tile Variants With Up To 48 Cores & 288 MB Cache & Single-Compute Tile With Up To 24 Cores & 144 MB Cache
Just a day after it was reported that Intel's Nova Lake-S Unlocked CPUs will be the ones to feature the new "bLLC" layout, featuring higher dedicated cache, it is now stated that at least four models will feature this higher cache configuration.
The latest rumor on Intel's Nova Lake-S "bLLC" CPU variants comes from Kopite7kimi, who points out that there will be at least four SKUs that will offer bLLC "Big Last-Level Cache". Once again, all four of these are going to be "Unlocked" designs, which support overclocking and offer the best dies. These four variants include:
- 2x 8+16 (48 Cores + 4 LPE Cores) + 288 MB bLLC
- 2x 8+12 (40 Cores + 4 LPE Cores) + 288 MB bLLC
- 8+16 (24 Cores + 4 LPE Cores) + 144 MB bLLC
- 8+12 (20 Cores + 4 LPE Cores) + 144 MB bLLC
First up, we have the dual compute tile models, which will feature two 8+16 core tiles. The compute tiles will offer up to 48 cores and 48 threads with an additional 4 LPE cores for a total of 52 cores. These chips will come configured with 144 MB of bLLC across each compute tile for a total of 288 MB cache. That's in addition to the L2 and L3 cache offered per compute tile, so the final number is going to be massive, and will be competing against AMD's Dual 3D V-Cache CCDs, which are first expected with Zen 5 CPUs, & will be followed by Zen 6 offerings.
In addition to the 48-core variant, there will also be a 40-core variant featuring a similar dual-compute tile and dual bLLC setup based on two 8+12 compute tiles. It is not known if the bLLC cache will remain the same or will be of a lower amount on this particular SKU.
Then we have the single compute tile offerings, which come in 8+16 and 8+12 SKU flavors. These Intel Nova Lake-S Desktop CPUs will feature up to 144 MB of bLLC in 24 and 20-core configurations. Intel is likely to introduce single-compute tile flavors first before venturing into the dual-compute tile territory.
Kopite further states that the bLLC will lead to heightened challenges for motherboard manufacturers who will have to work on advanced power delivery solutions on their next-gen products featuring the new LGA 1954 socket.
With that said, the insider isn't 100% sure about the nature of his statement, and these plans could likely change, but it looks like Intel is aggressively working on a solution to tackle AMD's Ryzen 3D V-Cache CPUs which have been a big success for Team Red, offering much better CPU gaming performance, and even better efficiency compared to the competition.
Nova Lake-S vs Arrow Lake-S
| Family | Nova Lake-S | Arrow Lake-S |
|---|---|---|
| Core Count (Max) | 52 | 24 |
| Thread Count (Max) | 52 | 24 |
| Max P-Cores | 16 | 8 |
| Max E-Cores | 32 | 16 |
| Max LP-E Cores | 4 | 0 |
| Max Cache (L2+L3) | TBD | 76 MB |
| Max bLLC Cache | 144-180 MB | N/A |
| DDR5 (1DPC 1R) | 8000 MT/s | 7200-6400 MT/s |
| PCIe 5.0 Lanes (Max) | 36 | 24 |
| PCIe 4.0 Lanes (Max) | 16 | 4 |
| Socket Support | LGA 1954 | LGA 1851 |
| Max TDP | 150W | 125W |
| Launch | 2026 | 2H 2025 |
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