Intel has showcased its packaging prowess with a multi-chiplet product featuring 18A/14A node tiles, Foveros 3D & EMIB-T technologies.
Intel Is Indeed Cooking With Its Next-Gen 18A/14A Process Nodes, Foveros 3D & EMIB-T Technologies: Showcases Conceptual & Highly-Scalable Designs With Up To 16 Compute Tiles, 24 HBM Sites & A Lot More
Intel is not holding back on its advanced packaging solution and has just showcased what the future holds for customers who aim to utilize its technologies in building future chips.
These technologies will be setting the standard for next-gen chips for HPC, AI, Datacenters, and more. Intel's Advanced Packaging solutions will also increase the competition against TSMC's CoWoS solutions, which have also outlined a 9.5 Reticle solution leveraging the A16 process node and more than 12 HBM4E sits (CoWoS-L).
The following are some of the main technologies that Intel will leverage to produce the next generation of compute powerhouses:
- Intel 14A-E: Breakthrough logic with RibbonFET 2 and PowerDirect.
- Intel 18A-PT: First basedie with backside power, increasing logic density and power reliability.
- High-Performance Top Die: Next-gen performance with improved density and performance per watt (Intel 14A/14A-E Process Node).
- Foveros Direct 3D: Precision 3D Stacking with hybrid bonding at ultra-fine pitch.
- EMIB-T (Embedded Multi-die Interconnect Bridge): Next-gen EMIB adds TSVs for higher bandwidth and larger tile integration.
- HBM Protocol Support: Seamless support for the latest and future HBM standards (HBM4/HBM5/HBM-Next).
- >12x Reticle Scalability: Architectures enabled to exceed traditional reticle limits.
In the video published by Intel, the company showcases two advanced packaging chip solutions. These are obviously conceptual designs, but the design is the interesting part. One chip is showcased with four compute tiles and 12 HBM sites, while the second features 16 compute tiles with 24 HBM sites. There are also twice the LPDDR5X controllers, with up to 48 on the bigger solution.
The chip comprises a compute base die that utilizes the 18A-PT process technology. This tile houses the SRAM, similar to how Clearwater Forest is made. Clearwater Forest is made on the 18A process node and houses 576 MB of L3 cache on its triple Base Tile solution. The base tiles for Clearwater Forest are fabricated on the Intel 3 process technology, so we can expect Intel 18A-PT to further optimize & increase the number of SRAM we see on future chips.
The base tile is then topped off with the main compute tile, which can include AI Engines, CPUs, or other IPs. These are fabricated on the Intel 14A or 14A-E process technologies, and are connected to the base tile using the Foveros 3D packaging solution. This acts as a 3D stack.
The multiple chiplets are then connected and further interconnected with the memory solution using EMIB-T interconnect. The top-chip that has been visualized makes use of 24 HBM sites, and these can either be modern HBM standards, such as HBM3/HBM3E, or future standards such as HBM4/HBM4E or HBM5. The singular package can also host up to 48 LPDDR5x controllers to really expand upon memory density for AI and datacenter workloads.
Intel also states that they have a very diverse ecosystem engagement plan and engage directly with industry partners for faster time-to-market and supply chain resiliency.
This advanced packaging chip showcase is definitely aimed at external customers who are looking at what Intel has to offer, and especially what 14A has to offer, as that node is specifically designed for 3rd party customers. Intel has already stated that 18A was mostly used for its own internal products, but with 14A, they have more customers engaging with them, and with advanced packaging solutions such as the ones highlighted here, Intel seems to be very much in the Fab game.
The only thing we now have to see is actual products and confirmations come out as to which products and which major players will get to use Intel Fabs. There have been a few hints here and there, but there's nothing conclusive yet. We should remember that Intel has been at the top of the advanced packaging game for a while. Their last chip, Ponte Vecchio, was a miracle from an engineering perspective, but due to lots of delays associated with yields, the product didn't turn out to be much of a success, and several Intel projects, including Falcon Shores, were dropped.
The company is making a comeback with Jaguar Shores and the highly anticipated Crescent Island GPU for AI, but at the same time, their real test is now to procure deals from 3rd party, as a lot is riding on the company's 14A technology.
About the author: A Software Engineer by training and a PC enthusiast by passion, Hassan Mujtaba serves as Wccftech's Senior Editor for hardware section. With years of experience in the industry, he specializes in deep-dive technical analysis of next-generation CPU and GPU architectures, motherboards, and cooling solutions. His work involves not only breaking news on upcoming technologies but also extensive hands-on reviews and benchmarking.
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