Intel 5th Gen Xeon, Emerald Rapids, Features Dual-Chiplet Layout, More Cache, More Expensive Than Sapphire Rapids

Intel's 5th Gen Xeon lineup codenamed Emerald Rapids launches later this year and we have a detailed analysis of the family done by SemiAnalysis.

Intel's 5th Gen Xeon Emerald Rapids Deep-Dive Reveals It Costs More Than 4th Gen Sapphire Rapids

Intel recently announced that its 5th Gen Xeon family codenamed Emerald Rapids, will feature high-quality silicon, higher performance per watt in the same power envelope, increased gen-on-gen core densities, and will be compatible with the same platform as the 4th Gen Xeon chips. The lineup is sampling today and scheduled for delivery in Q4 2023.

Intel also gave a first look at the actual silicon which cut down on the monolithic design from the previous gen. While Sapphire Rapids features a quad-chiplet design, Emerald Rapids was shown to utilize two bigger chiplets. Now, Semianalysis has provided an in-depth look at what the 5th Gen Xeon Scalable family has to offer and whether this new design is more cost-effective or not when compared to Sapphire Rapids.

One of the first similarities between the Emerald Rapids and Sapphire Rapids Xeon CPUs is that they utilize the same LGA-4677 socket. What sets the two apart is that the new Emerald Rapid server processors will offer an increased performance through larger on-die caches.

Emerald Rapids is expected to make use of the Raptor Cove core architecture which is an optimized variant of the Golden Cove core that will deliver 5-10% IPC improvement over Golden Cove cores. It will also pack up to 64 cores &  128 threads which is a small core bump over the 56 cores and 112 threads featured on Sapphire Rapids chips.

In its breakdown, the Intel Emerald Rapids XCC core was used for comparison which should feature a total of 66 on-die cores of which 64 cores will be enabled on the top SKU so that's 33 cores per die. Each core will feature 2 MB of L2 cache and 5 MB of L3 cache. The L3 cache gets a 2.66x boost over Sapphire Rapids which offers 1.875 MB L3 cache per Golden Cove core.

• Intel Emerald Rapids-SP (64-Core SKU) - 320 MB L3 + 128 MB L2 = 448 MB Total Cache
• AMD EPYC Genoa (64-Core SKU) - 384 MB L3 + 96 MB L2 = 480 MB Total Cache
• Intel Sapphire Rapids-SP (60-Core SKU) - 112.5 MB L3 + 120 MB L2 = 232.5 MB Total Cache

 

The Intel 7 process will be the basis of the Emerald Rapids series, which uses the 10nm Enhanced SuperFin, & is expected to have some improvements to the architecture to increase performance.

The new Emerald Rapids Xeon series produces up to four 20 GT/s UPI links for inter-socket data transmission. There is a forty-eight-lane PCIe 5.0 root complex with forty wired, totaling 80 lanes in full, which is identical to Sapphire Rapids. The memory interface remains unchanged, but Emerald Rapids will offer an eight-channel DDR5 interface with increased speeds of 5600 Mbps.

 

It is estimated by Semianalysis that the total dual-chip area of Intel's 5th Gen Emerald Rapids Xeon CPUs won't be that different compared to Sapphire Rapids, measuring around 1493mm2 (vs 1510 mm2).

Semi Analysis states that Emerald Rapids will cost more than Sapphire Rapids to manufacture and that might end up being a problem competing against ramped-up AMD's Genoa & Genoa-X chips (debut expected this quarter). The new Emerald Rapids series should appear in the third quarter of this year.

Intel Xeon CPU Families (Preliminary):

Family Branding	Coral Rapids	Diamond Rapids	Clearwater Forest	Granite Rapids	Sierra Forest	Emerald Rapids	Sapphire Rapids	Ice Lake-SP	Cooper Lake-SP	Cascade Lake-SP/AP	Skylake-SP
Process Node	Intel 14A?	Intel 18A-P	Intel 18A	Intel 3	Intel 3	Intel 7	Intel 7	10nm+	14nm++	14nm++	14nm+
Platform Name	TBD	Intel Oak Stream	Intel Birch Stream	Intel Birch Stream	Intel Mountain Stream Intel Birch Stream	Intel Eagle Stream	Intel Eagle Stream	Intel Whitley	Intel Cedar Island	Intel Purley	Intel Purley
Core Architecture	TBD	Panther Cove-X	Darkmont	Redwood Cove	Sierra Glen	Raptor Cove	Golden Cove	Sunny Cove	Cascade Lake	Cascade Lake	Skylake
MCP (Multi-Chip Package) SKUs	Yes	Yes	Yes	Yes	Yes	Yes	Yes	No	No	Yes	No
Socket	TBD	LGA XXXX / 9324	LGA 4710 / 7529	LGA 4710 / 7529	LGA 4710 / 7529	LGA 4677	LGA 4677	LGA 4189	LGA 4189	LGA 3647	LGA 3647
Max Core Count	TBD	Up To 192 P-Cores	Up To 288	Up To 128	Up To 288	Up To 64?	Up To 56	Up To 40	Up To 28	Up To 28	Up To 28
Max Thread Count	TBD	Up To 192	Up To 288	Up To 256	Up To 288	Up To 128	Up To 112	Up To 80	Up To 56	Up To 56	Up To 56
Max L3 Cache	TBD	TBD	TBD	480 MB L3	108 MB L3	320 MB L3	105 MB L3	60 MB L3	38.5 MB L3	38.5 MB L3	38.5 MB L3
Memory Support	TBD	Up To 16-Channel DDR5-9000+	Up To 12-Channel DDR5-8000	Up To 12-Channel DDR5-6400 MCR-8800	Up To 12-Channel DDR5-6400	Up To 8-Channel DDR5-5600	Up To 8-Channel DDR5-4800	Up To 8-Channel DDR4-3200	Up To 6-Channel DDR4-3200	DDR4-2933 6-Channel	DDR4-2666 6-Channel
PCIe Gen Support	PCIe 6.0	PCIe 6.0	PCIe 5.0 (96 Lanes)	PCIe 5.0 (136 Lanes)	PCIe 5.0 (88Lanes)	PCIe 5.0 (80 Lanes)	PCIe 5.0 (80 lanes)	PCIe 4.0 (64 Lanes)	PCIe 3.0 (48 Lanes)	PCIe 3.0 (48 Lanes)	PCIe 3.0 (48 Lanes)
TDP Range (PL1)	TBD	TBD	Up To 500W	Up To 500W	Up To 350W	Up To 350W	Up To 350W	105-270W	150W-250W	165W-205W	140W-205W
3D Xpoint Optane DIMM	TBD	TBD	N/A	Donahue Pass	N/A	Crow Pass	Crow Pass	Barlow Pass	Barlow Pass	Apache Pass	N/A
Competition	TBD	AMD EPYC Venice	AMD EPYC Turin	AMD EPYC Turin	AMD EPYC Bergamo	AMD EPYC Genoa ~5nm	AMD EPYC Genoa ~5nm	AMD EPYC Milan 7nm+	AMD EPYC Rome 7nm	AMD EPYC Rome 7nm	AMD EPYC Naples 14nm
Launch	2028-2029	2027	2026	2024	2024	2023	2022	2021	2020	2018	2017

News Sources: TechPowerUP, Semi Analysis

Follow Wccftech on Google to get more of our news coverage in your feeds.