AMD & Intel’s ACE Partnership Significantly Boosts AI Performance As The “Standard Matrix-Acceleration Architecture” For x86 Chips

ACE or AI Compute Extensions aim to revolutionize AI by bringing faster matrix-multiply performance as Intel & AMD work toward a unified path for x86 architectures.

ACE Is Part of Intel and AMD's Unified x86 Strategy, Driving The Ecosystem In The AI Era With Faster Matrix Acceleration

Last year, Intel and AMD partnered to strengthen the x86 ecosystem through their "x86 Ecosystem Advisory Group" initiative. The plan was to offer a standardized set of features across architectures in a bid to make x86 accessible, scalable, and compatible with future requirements. Four key features were announced: FRED, AVX10, ChkTag, and ACE.

Now, the ACE Whitepaper has been published by AMD and Intel and gives us an insight into what this new feature for x86 chips has to offer.

With input from the EAG, AMD and Intel have worked together to align and refine the ACE ISA, delivering standardized matrix acceleration features across the x86 ecosystem. The alignment has produced several positive outcomes: the resulting architecture proposal incorporates ideas and contributions from both vendors, as well as insights from the broad market reach of the EAG community. AMD and Intel continue to cooperate on the future roadmap for ACE and AVX10, aiming to embrace new opportunities in AI and other workload domains. The widespread adoption and high performance of x86 make it an ideal choice for developers; the addition of ACE to the ISA further strengthens the future of the x86 ecosystem.

In this paper, we introduce the AI Compute Extensions for the x86 ISA. ACE offers a significant increase in matrix multiply performance, scalability, and energy efficiency. ACE integrates seamlessly with AVX10, providing a low-friction and ubiquitous matrix acceleration capability for the x86 ecosystem.

AI Computex Extensions (or ACE) for x86 architectures aim to offer a significant increase in matrix multiply performance, while offering scalability and energy efficiency. As we know, Matrix Multiplication is the core block of neural networks and LLMs in AI workloads. Current SIMD (Single Instruction, Multiple Data) extensions, such as AVX10, can do matrix multiplication, but their scalability and compute density can be limited. Techniques such as Accelerated Matrix Multiplication can lead to higher performance, but this is not an efficient approach.

The EAG aims to solve this through ACE with accelerates matrix multiplication while offering greater flexibility and scalability. It allows reuse of existing AVX10 optimizations, crafting a scalable matrix acceleration framework for a wide range of implementations from laptops to supercomputers. This scalability and cross-platform capability reduce developer friction when compared to offloading AI compute to specialized hardware.

As per the whitepaper, AMD and Intel are calling ACE the "Standard Matrix Acceleration Architecture for x86".

Coming to the details, ACE supports native matrix multiplication of popular AI data formats, including INT8, OCP FP8, OCP MXFP8, OCP MXINT8, and BF16. ACE also introduces matrix acceleration based on outer product operation, which is designed to work with AVX10. The ACE outer product operation offers a 16x compute density benefit over an equivalent AVX10 multiply-accumulate operation while consuming the same number of input vectors.

Since ACE is an extension to the AVX10 instruction set, its software enablement is underway, and several integrations include:

• Deep Learning and HPC libraries (e.g., lower-precision GEMMs, LLM primitives)
• Popular Python-based libraries such as NumPy and SciPy • Machine learning frameworks including PyTorch and TensorFlow

ACE is just one step in the path forward for x86. NVIDIA's CEO himself has stated that the x86 alliance between Intel and AMD was necessary to keep the architecture alive. And it looks like x86 is in good hands.

News Source: @G_melo_ding

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